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TX Issue on i.MX6 ECSPI (Slave)

Question asked by cedricatmentor on Nov 4, 2013
Latest reply on Jan 10, 2014 by fe la

ssue description
======================
In Slave mode writing to ECSPIx_TXDATA(TXFIFO) works as expected - words are shifted from TXFIFO to MISO line during transfers initiated by SPI Master. But this works only for first 64 words written to ECSPIx_TXDATA. After writing to ECSPIx_TXDATA for 65th time, iMX starts always sending 65th word on MISO. TXCNT in ECSPIx_TESTREG shows that TXFIFO is empty (==0). Subsequent writings to TXFIFO will not work (iMX will still send 65th word on MISO line).

SPI configuration
======================
SPI Bus - ECSPI2
SS_POL=0
SS_CTL=0
SCLK_POL=0
SCLK_PHA=0
BURST_LENGTH=0x01F // 32bit
CHANNEL_MODE = 0 //Slave mode

Steps to reproduce
======================
1) Configure SPI channel (ECSPI2) as a Slave;
2) Set BURST_LENGTH=0x01F;
3) Initiate one transfer with 64 words in tx_buf or 64 tranfers with 1 word or 16 tranfers with 4 words. I.e. TXFIFO should be written 64 times.
4) Next write to TXFIFO should make iMX to always shift this 65th word to MISO line.

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