I want to use DMA to transfer a large number of bytes (n, 16 KB) to an SPI slave and I need to know when the last bit has been shifted out, so the last transfer must have the end of queue bit set so I can check for it in the status register. My source buffer is an array of bytes.
How can I configure a DMA transfer that sets the EOQ bit in the last transfer? It seems to me that I can only do this with two transfers, one with n-1 bytes and one with a single 32-bit word that has the EOQ bit set. That looks a bit clumsy and I would need a chain of DMA transfers for that. Or is there another way of telling if all bits have been shifted out? I can periodically check for transfer completion; an interrupt handler is not necessary. If the solution incorporates one, that's fine.
So far I have only used DMA for a simple memcpy experiment to see if I can configure it correctly. I have no experience with more complex DMA applications or those involving peripherals such as the SPI.