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config.bib ROMOFFSET calculation for iMX53 EC7 platform

Question asked by Bruno De Paoli on May 15, 2013
Latest reply on Jun 6, 2014 by Bruno De Paoli
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Hi,

 

I am attempting to build an image for NOR flash on an EC7 iMX53 based platform.

 

I am using the SABRE ARD BSP as the base BSP for this. The config.bib file does not appear to have support for NOR flash and my understanding is that I need to modify this file (amongs other things). Specifically in config.bib I think I need to define the ROMOFFSET variable to suit my configuration/platform. The MSDN documentation states that this is needed when the run-time image is located at a different address. This is the case here since it is stored in NOR but I want it to execute from RAM. I believe I can use XIP but I don't want to do this just yet. I have attempted to use the NAND flash section as an example of what to do but I find it confusing.

 

For example in config.bib here is where ROMOFFSET is defined for Nand Flash.

 

        ; CSP_BASE_MEM_PA_NFC+IMAGE_BOOT_NKIMAGE_NAND_OFFSET = 0x9F5F0000 + 0x80400 = 0x9F670400

        ; ROMOFFSET = (FLASH_PHYSICAL_ADDRESS - ROMSTART) % 0x100000000

        ;           = (0x9F670400 -  0x80200000) % 0x100000000 = 0x1F470400

        ROMOFFSET=0x1F470400

 

Here is a relevant line from the g_oalAddressTable in oemaddrtab_cfg.inc defining the virtual/physical addresses for NAND controller.

 

       DCD 0x9F500000, CSP_BASE_MEM_PA_NFC_1MB, 5      ; NFC internal buffer

 

 

The first comment in config.bib says CSP_BASE_MEM_PA_NFC+IMAGE_BOOT_NKIMAGE_NAND_OFFSET = 0x9F5F0000 + 0x80400 = 0x9F670400.

 

CSP_BASE_MEM_PA_NFC equals 0xF7FF0000 for an iMX53 and not 0x9F5F0000 as in the comment. 0x9F5F0000 looks like a virtual address as defined in g_oalAddressTable.

Secondly NAND virtual address start at 0x9F500000 and not 0x9F5F0000. There appears to be an offset of 0xF0000.

To confuse things further I have seen it stated that ROMOFFSET is used for Physical<->Virtual address compensation.

 

I am trying to use the NAND as an example of what to do with NOR but I find it totally confusing. So can someone clarify this?

 

  • The comments state physical addresses but the actual calculations appear to use virtual addresses.
  • The NAND virtual start address used (0x9F5F0000) is not the start of NAND (0x9F500000) as per the g_oalAddressTable. Where did this 0xF0000 offset come from?

 

Thanks in advance.

 

Bruno

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