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i.MX53 - LPDDR2 DDR Stress Test

Question asked by Sridevi Kandaswamy on Apr 21, 2013
Latest reply on Jul 13, 2013 by Sridevi Kandaswamy

We have our custom design based on i.MX535 with Elpida EDB4032B2PB (512MB LPDDR2-S4) & Samsung KLM4G1FE3B-B001 (4GB eMMC Flash). The product is in the hardware bringup phase. To check the processor memory interface, the DDR Stress Test was performed and the result of the same is herewith attached.


1. Since there is no detailed user manual or guide for this stress test regarding the observation or results, Pls advice what does this result as per the attachment signify? Is there any way to identify where the problem exists?

2. Does DDR Stress Test carry out rigorous testcases with varying test patterns to validate the interface? Is there any document to understand or infer from the results? What is the procedure being adopted during the test?

3. Do we have any bare metal tests for i.MX535 Sabre/QSB interfaces to test via the JTAG Emulator?


Pls advice.