UART RX DMA Interrupt Signaling & IDLE condition

Discussion created by pmt on Oct 15, 2012
Latest reply on Aug 3, 2014 by Stel Vasiu

I have a UART RX DMA driver written but I am looking for the best method to invoke a receive interrupt such that I can use event signaling to implement proper blocking I/O calls.  Ideally, you want to invoke an interrupt after a certain amount of continuous characters are received (but not every character), and you want to invoke an interrupt after the line goes idle for a certain time after reception of at least one character.  I would settle for just the idle interrupt functionality alone.


Now, the Kinetis UART/DMA peripheral set is amazingly good from my experience thus far.  But I am trying to make sense of the idle interrupt generation.  And it seems at least this implementation is really flawed, unless my understanding is incorrect.  You can invoke an interrupt after the line goes idle for 10, 11, or 12 bits times (depending on mode), however in order to service this interrupt you have to read the status register (which has side effects to all the status bits), but even worse you have to then read the Data register, in that order.


Now how pray tell can this be achieved in the context of an RX DMA read which has already taken place before the ISR can even be serviced?  The read of the data register in the ISR will cause a FIFO misalignment because the FIFO is empty.


Is there a certain nuanced setup?  How are others handling this?  It would be nice if this interrupt was a self clearing one shot in hardware.  I don't understand what the current implementation is good for other than for non-DMA functionality.