iMX RT1064 - LPSPI Maximum FIFO Size

[nbgatgi]

I was reading through the datasheet regarding LPSPI registers and found where the FIFO size is set.  The "parameter register (PARAM)" has two 8-bit fields that represent "maximum number of words in the receive FIFO, which is 2^RXFIFO" or "2^TXFIFO".  As I read this, it implies an unreasonably large maximum FIFO size.  The default value for both TX and RX is 4 which is a FIFO size of 16 words.

Looking further, the "FIFO control register (FCR)" includes 4-bit fields for FIFO watermark values.  This allows for a maximum watermark value of 15.

So, simple question:  Is the maximum LPSPI FIFO size for the RT10xx 16 words?

[jeremyzhou · Accepted solution]

Hi Nick Guzzardo,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
Q1)  Is the maximum LPSPI FIFO size for the RT10xx 16 words?
-- Yes, it's.

Have a great day,
TIC

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