iMX RT1062 LPSPI clock incorrect
I'm not getting the LPSPI clock rate and Delay Between Frames timing that I expect.
With an LPSPI functional clock of 96MHz, I believe I should be able to achieve a 24MHz SPI clock (SCK) with a TCR.PRESCALE value of 1 (divide by 2) and a CCR.SCKDIV value of 0 (divide by 0 + 2). This should be 96MHz / 2 / 2 = 24MHz. From my scope capture I see a SPI clock of 20.833MHz.
With a functional clock of 96MHz and the TCR.PRESCALE value of 1 (divide by 2), I believe I should be able to achieve a Delay Between Transfers of 5us with a CCR.DBT value of 238. This should be (238 + 2) / (96MHz / 2) = 5us. From my scope capture I see a delay between transfers of 6us.
Note, I manually edited the LPSPI_MasterInit() function in the fsl_lpspi.c driver generated by MCUXpresso to force PRESCALE = 1, SCKDIV = 0, and DBT = 238, because the values computed by this function were also wrong. LPSPI_MasterInit computed PRESCALE = 0 (divide by 1), SCKDIV = 2 (divide by 4) and DBT = 255. In this configuration SCK should still be 24MHz as requested, but I still see 20.833MHz on the scope. The DBT value in this case would result in a delay of 3.2us, which is less than requested. Here are my edits...
This is how I configured the 96MHz LPSPI_CLK_ROOT.
