Using SDRAM for RT1176 B0

[huangkenny]

I'm using RT1176 B0 version with 16MB external SDRAM, when I tried to store data in the SDRAM section by using AT_BOARDSDRAM_SECTION_ALIGN, after executing the debug button, it will stuck and cannot debug at all. 

I suspect it may be related to the dcd file setting and I change the MS value in Base Register 0 (For SDRAM CS0 device) (BR0) from 64MB(sample code from SDK 2.8.1)  to 16MB, but it still not working. 

I wonder is there any other register that I should modify?

Thanks in advanced.

[huangkenny]

By the way, I'm using MCUXpressoIDE_11.2 with pemicro multilink for debugging.

[jeremyzhou]

Hi,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.

I still have no idea about the issue by looking through your statement and attachment, whether you can introduce more details about your testing process, for instance, what demo project you used, the modification about this demo project, etc.
Looking forward to your reply.

Have a great day,
TIC

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[huangkenny]

Hi,

Sorry for confusing. The project I used is modified from the sample project "evkmimxrt1170_elcdif_rgb_cm7" but to change the assigned memory of s_frameBuffer from AT_NONCACHEABLE_SECTION_ALIGN to AT_BOARDSDRAM_SECTION_ALIGN.

My current problem is when I use the AT_BOARDSDRAM_SECTION_ALIGN, build the code, then trying the debug, the process seems to stuck in the beginning, and the program is not running at all, I cannot even operate anything but to disconnect and power down the unit. 

However, if I only modify the parameter allocation moved from SDRAM to SRAM, it can debug successfully and the program can be run on my unit.

Since I'm using the default dcd file from the SDK, I'm not sure if there's any setting for SDRAM is missing or incorrect.

Please see attached the memory details.

Thanks,

[jeremyzhou]

Hi, 

Thanks for your reply.
According to your statement, I think the issue is related to i.MX RT L1 Cache, and use the AT_BOARDSDRAM_SECTION_ALIGN to declare a cacheable buffer need to do some cache maintenance and I'd like to suggest you to learn to make it by referring to the application note: AN12042.
Have a great day,
TIC

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