RT1050 SAI External Clock and Maximum Data Rates

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RT1050 SAI External Clock and Maximum Data Rates

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Contributor I

Hi

I just heard the RT 1050 from RT-Thread community, I am very interested in this chip, and I want to build a portable HIFI music player with it. But I am completely new with i.mx MCUs.

I am looking for extern master clock input on SAI peripherals. Because I think external clock source might provide better specs than internal audio PLL, (i cant find the jetter in specifics of the audio PLL).

Question is, is it possible to use external clock source for SAI?

While I am checking manual, there is a few clock souces for SAI but not very clear for me. 

In IOMUXC, it is possible to set MCLK to input, and MCLK2 can be select to saix_ipg_sai_mclk[x].

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If I understand correctly, while I connect a external clock source to one of the pad which can be alternated to one of the   saix_ipg_sai_mclk[x], and configure SAI1_MCLK_DIR to input signal; then it would allow me to use external clock source instead of internal PLL for SAI? (sorry it's a little bit long)

I am asking because when i tried to use MCUXpresso to see the pinout, but I found that the MCLK pin cannot be set to input. (Sorry about the language, i couldnt set it to English while my system language is Chinese, but it should be clear)

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Another question is what is the maximum data rate of it?

Can it reach 192k while using 32bit data? I did some research, somewhere says 66 MHz maximum. And in SDK, i found that the source code has only enum to 96kHz.

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Thanks for your time and patient.

Regards

Jianjia

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NXP TechSupport
NXP TechSupport

Hi Jianjia

yes it is possible to use external clock source for SAI, there are several options for generating MCLK,

please refer to SAI TCR register field MSEL Master Clock (MCLK) option selected, described in
sect.47.4.1.6 SAI Transmit Configuration 2 (TCR2), Figure 9-3. Audio subsystem clocking diagram
i.MX RT1050 Processor Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf
For eample iomux.sai1_jpg_clk_sai_mclk[2] corresponds to SAI1_MCLK Table 4-1. Muxing Options,
SAI1.MCLK Figure 9-3.
Max. data rate can be checked in sect.4.7.1 SAI/I2S switching specifications i.MXRT1050 Datasheet
https://www.nxp.com/docs/en/data-sheet/IMXRT1050CEC.pdf
seems it is the same as i.MX7D SAI described in sect.4.10.12 SAI/I2S switching specifications
i.MX7D Datasheet
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX7DCEC.pdf

Best regards
igor
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NXP TechSupport
NXP TechSupport

Hi Jianjia

yes it is possible to use external clock source for SAI, there are several options for generating MCLK,

please refer to SAI TCR register field MSEL Master Clock (MCLK) option selected, described in
sect.47.4.1.6 SAI Transmit Configuration 2 (TCR2), Figure 9-3. Audio subsystem clocking diagram
i.MX RT1050 Processor Reference Manual
https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf
For eample iomux.sai1_jpg_clk_sai_mclk[2] corresponds to SAI1_MCLK Table 4-1. Muxing Options,
SAI1.MCLK Figure 9-3.
Max. data rate can be checked in sect.4.7.1 SAI/I2S switching specifications i.MXRT1050 Datasheet
https://www.nxp.com/docs/en/data-sheet/IMXRT1050CEC.pdf
seems it is the same as i.MX7D SAI described in sect.4.10.12 SAI/I2S switching specifications
i.MX7D Datasheet
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX7DCEC.pdf

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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