PIT clock source setting RT1176

[auftrag2021]

Hello, 

the PIT seems to be a very simple peripheral to use. But I couldn't find the clock source setting for PIT in the MCUXpresso configuration tools like other peripherals like ADC, CAN etc. Why?

What happen if I want to build a very very very long timer, like days? the default value 240MHz ist too fast.

Okay, maybe I can change the bus clock root setting, but there are many other devices like ADC_ETC also hanging on the (240MHz) bus clock root , which I dont want to change them. 

What should I do?

[mjbcswitzerland · Accepted solution]

Hi

PIT1 is clocked from BUS_CLK_ROOT and so if you reduce this you will reduce it for all other modules using the same clock root.

PIT1 channels 0 and 1 can however be chained to build a 64 bit counter, which allows increasing the maximum period by 4Gx. Even at 240MHz this gives about 2'500 years before it overflows.

PIT 2 is clocked from BUS_LPSR_CLK_ROOT and so, if your design can use a much slower BUS_LPSR_CLK_ROOT, (much) longer 32 bit periods can be achieved. Also PIT 2's channels 0 and 1 can be chained to further increase the maximum period.
Eg. if BUS_LPSR_CLK can be set to (OSC_24M / 256) the PIT 2 can count up to 12.7 hours before overflowing.
The same using two chained channels can count to 6 million years before overflowing.

Whatever solution is used a PIT period interrupt can also be used as a counter so that software can further extend the period of software timers beyond that possible with the HW limitation.

Regards

Mark