imxrt 1020 FlexCAN example code.

[emb01_jtronix]

Hi,

I am using MIMXRT1020-EVK board and interfacing CAN I run flexcan_loopback_functional example code and I am getting proper output.

But

Now I am using MIMXRT1020-custom board with chip MIMXRT1021CAG4A and interfacing CAN for trial purpose I am running  flexcan_loopback_functional example on board and code asserted at ( assert(priDiv <= sourceClock_Hz)).My CAN channel is on same port as in EVK board, I am using same crystal oscillators in my board as in EVK board but source frequency getting different. What should I check to rectify this issue?

software using :MCUXpresso IDE v11.2.1 [Build 4149] [2020-10-07]

Thank you.

[emb01_jtronix]

Waiting for reply

Thank you.

[emb01_jtronix]

Thank you for reply.

When I am working with my custom board and own software routine ESR1 is setting as 0X42252 so error bit is set and transmission is not happening what should I do to resolve this problem?

[emb01_jtronix]

Even I got sourceClock_Hz  20 MHz when I debug  the flexcan_loopback demo on MXRT1020 board but as I am using same example code with all the same configuration on my custom board why I am getting sourceClock_Hz is 1 MHz that is my concern.

[jeremyzhou]

Hi,
Thanks for your reply. It seems a bit weird, so I'd like to suggest you use the CCM_CLKO1 or CCM_CLKO 2 pin to output the clock, then you can use the oscilloscope to observe the clock.

It can help you to check whether the clock configuration works well.
Hope it helps.
Have a great day,
TIC

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[emb01_jtronix]

Thanks for your reply. I am getting low state (0) on this pin.

[jeremyzhou]

Hi,
Thanks for your reply.
It seems a bit weird, I was wondering if you can illustrate the process of configuring the clock source output via either the CCM_CLKO1 or CCM_CLKO 2 pin, it can help me to figure it out.
Have a great day,
TIC

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[emb01_jtronix]

Thank you,

Can you explain how to output the clock on this pin ?I just checked the signal on CCM_CLKO1.

[jeremyzhou]

Hi,
Thanks for your reply.
1) Can you explain how to output the clock on this pin?
-- Please configure these two pins via the CCM_CCOSR register.
Have a great day,
TIC

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[emb01_jtronix]

Thank you for reply.

When I run example code (flexcan loopback transfer) on EVK board I am getting frequency as I shown in below image :

But when I am using same code (flexcan loopback transfer) on my custom board I am getting bypass pll. I am getting frequency as I shown below image:

Why I am getting bypass pll is there anything I have to check with my custom board(Hardware). 

[jeremyzhou]

Hi,
Thanks for your reply. It doesn't make sense. According to your test, the PLL3_MAIN_CLK is from the OSC (24 M), it obvious be inconsistent with the flexcan_loopback_transfer demo (as the below figure shows).

So I'd like to suggest you check the clock diagram of the flexcan_loopback_transfer demo besides check with your custom board.
Have a great day,
TIC

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[emb01_jtronix]

Thank you.

But  how I configure this pin I am not getting please can you explain in detail how to configure this pins in register.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
The sourceClock_Hz is 20 MHz when I debug the flexcan_loopback demo on the MIMXRT1020 board, so I'd like to suggest you reconfigure the sourceClock_Hz to 20 MHz again.
Hope it helps.
Have a great day,
TIC

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