iMX RT105x : Running the Application From SDRAM

[muratcakmak]

Hi, 

We have a bootloader running in XIP QSPI flash (0x60000000) and this bootloader copies the application image sits in QSPI to the external SDRAM (0x80000000). The SDRAM image is built for SDRAM using a linker script and seems ok (at least IntelHex file seems ok)

Bootloader initialises the SEMC for the SDRAM and runs a SDRAM test for the whole address range, so SDRAM should be ok.

But after jumping I am getting a PRECISERR Bus Fault.

My jump code is simple, 

SDRAM_OFFSET 0x80000000

/* Set Main Stack Pointer; WORD 0 */

__set_MSP(*(uint32_t*) SDRAM_OFFSET );

/* App start point; WORD 1 */

voidFP app = (voidFP)(*(uint32_t *)(SDRAM_OFFSET  + 4));

/* Jump to Application */
app();

After I jump, I immediately get a hard fault handled in Bootloader Hardfault Handler which say Bus Fault. I get PRECISERR bus fault and the fault address (SCB->BFAR) is the top of the stack; 0x20020000

I know i need to set the SDRAM image vector table before jump, but if I set I dont get anything because if I cannot jump to the application, I never access the fault handler located in SDRAM. 

I hope it is not about Data caching on SDRAM.

I have seen some SDRAM example from the SDK but they run the image from the internal SRAM(DTCM, 0x20002000) if I dont miss something here. 

Just is there any limitation for running images on external SDRAM using SEMC?

[muratcakmak]

Hi Jeremy, 

Thank you for the reply. In our case, there was two different issues. 

I am wondering the SDRAM area can be cached by the both Data and Instruction caches at same time. When I disabled the cache, it worked. 

Other issue was that the application in the SDRAM was initialisating the SDRAM while the code is already running on the SDRAM. If I skip, it worked well as well. 

Regards.

Murat

[jeremyzhou]

Hi Murat Cakmak,

Thanks for your reply.

1) I am wondering the SDRAM area can be cached by both Data and Instruction caches at the same time. When I disabled the cache, it worked.
-- It's feasible, the SDRAM is able to be configured cacheable.
2) Another issue was that the application in the SDRAM was initializing the SDRAM while the code is already running on the SDRAM. If I skip, it worked well as well.
-- It's forbidden to reconfiguring the SDRAM while the inside code is executing.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

[jeremyzhou]

Hi Murat Cakmak,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
According to your statement, I guess the DTCM is used to store the DATA and BSS in your bootloader just likes the below figure shows, however, it will be incapable to cover the additional DATA and BSS when jumping the application in the SDRAM because of the limited size of the DTCM.
I think you'd better set the SDRAM image vector table before jumping, it can get rid of the memory assignment of the bootloader demo project.
Please give a try.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------