i.MXRT QSPI boot

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i.MXRT QSPI boot

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sugiyamatoshihi
Contributor V

Hi,

I have a question about QSPI boot of i.MXRT1050.

I checked Table 8-9. Fuse definition for Serial NOR over FlexSPI in reference manual, rev2 .

There is BOOT_CFG2[2:0] Device selection and QSPI description is only 111b column. 

Does it support QSPI by only BOOT_CFG2[2:0] =111?     

Does other BOOT_CFG2[2:0] =000 and 001 support for Single SPI mode?

Best Regards,

Sugiyama

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1,306 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi,

Untitled.png

000b- NOR QSPI flash which has 3 byte address read

001b- NOR QSPI flash which has 4 byte address read

Regards,

Jing

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2 Replies
1,307 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi,

Untitled.png

000b- NOR QSPI flash which has 3 byte address read

001b- NOR QSPI flash which has 4 byte address read

Regards,

Jing

1,306 Views
sugiyamatoshihi
Contributor V

Hi, Jing,

Thank you for your answer.

I understood.

Best Regards,

Sugiyama

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