i.MX RT1060 to i.MX RT1064

[lw3]

i. An exception occurred during the migration process of MX RT1060 to i. MX RT1064

In the program, initialize and open the 28 pins of GPIO2 on D13, and operate this GPIO to output high and low levels. The MX RT1064 chip will run with an exception

The same program i. MX RT1060 chip runs normally

The problem points of RT1064 chip operation error:

[20:32:24.861]收←◆[HardFault]
- Stack frame:
R0 = 0x20050e58
R1 = 0x2003e528
R2 = 0x20000a08
R3 = 0x20000a08
R12 = 0x200444d0
LR = 0xa5a5a5a5
PC = 0xa5a5a5a4
PSR = 0x6100000e
- FSR/FAR:
CFSR = 0x00000100
HFSR = 0x40000000
DFSR = 0x00000000
AFSR = 0x00000000
- Misc
LR/EXC_RETURN= 0x2003e528

[lw3]

I am following AN12290.pdf

The steps in the document to modify and migrate

[Miguel04]

Hi @lw3 

Thanks for the information.

I'll look into it.

Have you tried to use MCUXpresso?

Best Regards, Miguel.

[lw3]

I suspect that the operation of GPIO on the 28 pins of GPIO2 on D13 of chip RT1064 seems to affect the internal flash program operation

Normal LR will not have A5A5A5A5 address, only internal flash pins are affected

LR=0xa5a5a5a5

PC=0xa5a5a5a4

RT1060 does not have an internal flash, so there is no such issue

Is it related to the hardware schematic and PCB design of RT1060

[lw3]

I only use the MCU Xpress Config Tools software to generate and allocate gpio. Other functions are not used. I am using the Keil ide to develop applications for rt1060 and rt1064

MCUXpresso IDE software is not used

[Miguel04]

Hi @lw3 

Are you doing the linker file changes on MCUXpresso too? The appnote does not specifies more further changes besides, FlexSPI2, linker file and XIP boot options.

Best Regards, Miguel.

[lw3]

yes ，
The migration process from RT1060 to RT1064 was not modified by other applications

[Miguel04]

Hi @lw3 

I recommend you to follow the steps to port a project from this knowledge bases post.

elQ on I.MXRT1064 EVK

Best Regards, Miguel.

[lw3]

I have tried it and it still doesn't work. RT1064 is still not compatible, so I can only use RT1060 first

[lw3]

Okay, let me give it a try. The SDK version library currently in use is very different from the old version and requires a lot of changes

[lw3]

I only use the MCU Xpress Config Tools software to generate and allocate gpio. Other functions are not used. I am using the Keil ide to develop applications for rt1060 and rt1064

MCUXpresso IDE software is not used

[lw3]

用到GPIO2-28的功能  我只要用到这个GPIO2-28的功能  RT1064的程序就会报错误 去掉GPIO2-28的功能之后RT1064的程序 也能完全跑着正常  但是RT1060程序的跑着很正常 不会报错 

[lw3]

RT1060 移植到RT1064 我只要打开 GPIO 2-28 功能 这个gpio进行高低电平操作就会导致程序报错误
我去掉GPIO2-28的功能 就完全正常 不会到导致程序异常

[Miguel04]

Hi @lw3 

Can you tell me how are you doing the migration?

Best Regards, Miguel.

[lw3]

May I ask if SDRAM was not enabled in the RT1060 hardware design and GPIO was not enabled in the program

Will it affect the startup of RT1064 chip, and GPIO is not enabled

[lw3]

Other files in the keil project of RT1064 are identical to those in the keil project of RT1060. No changes have been made. Only the files I replied to

[lw3]

MIMXRT1062xxxxx_flexspi_nor.scf
board.c
clock_config.c
fsl_common.h
fsl_flexio.h
fsl_iomuxc.h
evkmimxrt1060_flexspi_nor_config.c
evkmimxrt1060_sdram_ini_dcd.c

Migration instructions:
Evkmimxrt1060_ Sdram_ Ini_ DCD. c not used
Evkmimxrt1060_ Flexspi_ Nor_ Config.c only modified the configuration

The following three file modifications were made based on the differences in the location of the latest version of the RT1064 chip's sdk library under Keil.

fsl_common.h
fsl_flexio.h
fsl_iomuxc.h

board.c
The board. c file only modified the FLASH section of the MPU The modifications are as follows:
/* Region 2 setting */
#if (RT1060_FLEXSPI_EN==1)

#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Setting Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_8MB);
#else
/* Setting Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_8MB);
#endif

#else
/* Region 2 setting */
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Setting Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x70000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_4MB);
#else
/* Setting Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x70000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB);
#endif

#endif

clock_config.c
Clock_ Config.c only modified the position of the Flexspi clock
Modify as follows:
#if (RT1060_FLEXSPI_EN==1)
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
* unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
#endif
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 0);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
//
#else
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
/* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
#endif
//
#endif

MIMXRT1062xxxxx_flexspi_nor.scf
This scf file only modified the starting address of the flash, and nothing else was changed:

#define m_flash_config_start 0x70000000
#define m_flash_config_size 0x00001000

#define m_ivt_start 0x70001000
#define m_ivt_size 0x00001000

#define m_interrupts_start 0x70002000
#define m_interrupts_size 0x00000400

#define m_text_start 0x70002400
#define m_text_size 0x007FDC00

[lw3]

The modified files for RT1060 to RT1064 are as follows:
MIMXRT1062xxxxx_flexspi_nor.scf
board.c
clock_config.c
fsl_common.h
fsl_flexio.h
fsl_iomuxc.h
evkmimxrt1060_flexspi_nor_config.c
evkmimxrt1060_sdram_ini_dcd.c
Evkmimxrt1060_ Flexspi_ Nor_ Modify config.c as follows:
#if (RT1060_FLEXSPI_EN==1)
const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_100MHz,
.sflashA1Size = 4u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 256u * 1024u,
.isUniformBlockSize = false,
};
#else

const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_120MHz,
.sflashA1Size = 4u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

// Read Status LUTs
[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

// Write Enable LUTs
[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),

// Erase Sector LUTs
[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),

// Erase Block LUTs
[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),

// Pape Program LUTs
[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
[4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),

// Erase Chip LUTs
[4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.ipcmdSerialClkFreq = 1u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};

#endif

Clock_ Modify config.c as follows:

#if (RT1060_FLEXSPI_EN==1)
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
* unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
#endif
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 0);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
//
#else
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
/* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
#endif
//
#endif

Modify board. c as follows:
/* Region 2 setting */
#if (RT1060_FLEXSPI_EN==1)

#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Setting Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_8MB);
#else
/* Setting Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_8MB);
#endif

#else
/* Region 2 setting */
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Setting Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x70000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_4MB);
#else
/* Setting Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x70000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB);
#endif

#endif