i.MX-RT mapping of functions in RAM (ITCM)

[andrea_botarell]

Hello,

I am currently developing on IMXRT1050-EVKB, starting from HyperFlash XIP example from SDK.

My purpose is to have part of the program executed from flash and some time-critical functions executed from RAM (i.e. ITCM section).

I just managed to do that by using __attribute__ ((section("..."))) keyword on the target functions. 

I have the following questions:

1)  Is it correct to use the __attribute keyword for this purpose or are there better alternatives?

2) Once the image is stored on flash, how the RAM-mapped code is actually loaded in RAM? (i.e. Is there a configuration section managed by boot or a low-level operation executed during application startup?)

3) In case we want map ISR in RAM, is it advisable to map in RAM also other code sections (e.g. IRQ vectors) in order to avoid lack of performances associated to transition from flash XIP to RAM execution?

Thanks in advance

[Takashi_Kashiwagi]

Hi Andrea.

> I have just a last question on this topic: in case I need to manage data-storage in the same flash in which application image is stored, is it possible to map in RAM the driver methods used for accessing the memory (i.e. read, erase, program) and execute the remaining application code with XIP from flash?

In case of IS26KS512S(Hyper Flash)  and data-storage is located in a different sector.

• RAM-mapped functions can access to Flash ROM(read, erase, program). However, while executing FlashROM erasing and writing, code in Flash ROM must not be executed. Specifically, you should disable interrupts durring executing the sector erase / write function (RAM-mapped), and don't call ROM located functions.
• This restriction is created because flash ROM Read should not be inserted in most flash ROM erase / write sequences. please see  table 40 in chapter 8 Software Interface Reference  in the Flash ROM manual(http://www.cypress.com/file/213346/download).

> I suppose that is not possible to work completely in XIP and access flash directly from flash-mapped code (i.e. maybe it could be possible just for read-only access).

As described above, although it is necessary to devise a little bit, it is possible.

• it is necessary to prevent access to the flash ROM during the flash ROM erase / write sequence.
• Execution of the ROM located function generates flash rom read, so Command sequence collapses.

Best regards,

T.Kashiwagi

[Takashi_Kashiwagi]

Hi.

I will answer the case of MCUXPresso IDE.(I don't have DS-5 and EWARM......)

> 1)  Is it correct to use the __attribute keyword for this purpose or are there better alternatives?

I do not know a good way other than this. But I think the usage of the __attribute keyword is correct.

By the way, I use it as follows.

#define DefKERNEL_SECTION_ITCM __attribute__((section(".ramfunc.$SRAM_ITC")))

DefKERNEL_SECTION_ITCM void vPortSVCHandler( void )

{

   ...

and a part of map file as follows. 

--

.data_RAM4      0x00000000     0x4470 load address 0x80047114
 FILL mask 0xff
                [!provide]                PROVIDE (__start_data_RAM4, .)
 *(SORT_BY_ALIGNMENT(.ramfunc.$RAM4))
 *(SORT_BY_ALIGNMENT(.ramfunc.$SRAM_ITC))

 .ramfunc.$SRAM_ITC
                0x00000000      0x380 ./amazon-freertos/FreeRTOS/portable/port.o
                0x00000078                vPortSetupTimerInterrupt
                0x000000b4                xPortPendSVHandler
                0x00000124                xPortSysTickHandler
                0x00000154                vPortSVCHandler

--

>2) Once the image is stored on flash, how the RAM-mapped code is actually loaded in RAM? (i.e. Is there a configuration section managed by boot or a low-level operation executed during application startup?)

In MCUXpresso IDE, RAM-mapped code is loaded by ResetISR(startup_mimxrt1052.c).  "data_init" function copies ".data" sections by __data_section_table.

 And you can see contens of __data_section_table from map file.

a part of map file as follows. In .data_RAM4,  "data_init" copies data by 0x4470 bytes from 0x80047114 to 0x0.

--

                0x800002c0                __data_section_table = .
                0x800002c0        0x4 LONG 0x8004697c LOADADDR (.data_RAM)
                0x800002c4        0x4 LONG 0x8004697c ADDR (.data_RAM)

 ...

                0x800002e4        0x4 LONG 0x80047114 LOADADDR (.data_RAM4)
                0x800002e8        0x4 LONG 0x0 ADDR (.data_RAM4)
                0x800002ec        0x4 LONG 0x4470 SIZEOF (.data_RAM4)

...

--

> 3) In case we want map ISR in RAM, is it advisable to map in RAM also other code sections (e.g. IRQ vectors) in order to avoid lack of performances associated to transition from flash XIP to RAM execution?

Yes, it is. And you should allocate kernel Stack and Staic variable in DTCM. 

In my case,  I allocated Kernel code and variables in TCM for performance. 

[andrea_botarell]

Hi Takashi,

Thanks for your very useful hints.

I have just a last question on this topic: in case I need to manage data-storage in the same flash in which application image is stored, is it possible to map in RAM the driver methods used for accessing the memory (i.e. read, erase, program) and execute the remaining application code with XIP from flash?

I suppose that is not possible to work completely in XIP and access flash directly from flash-mapped code (i.e. maybe it could be possible just for read-only access).