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I am looking into using I3C with DMA on RT685, but unfortunately the SDK does not have support for I3C DMA. Is there any plan to add support for I3C DMA to the SDK?
The LPC86x SDK does have support for I3C DMA, and the LPC86x appears to have a very similar I3C register set to the RT685. Would fsl_i3c_dma.[ch] from the LPC86x SDK be a good starting point for RT685?
https://docs.nxp.com/bundle/AN13952/page/topics/i3c_transfer_with_dma.html
Thanks!
解決済! 解決策の投稿を見る。
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Hi @jzipperer206 ,
Hope you are doing well!
I asked the internal team and there are a few bugs in the I3C DMA for RT6xx and RT5xx so they are not yet available to the public, therefore it is not recommended to do the porting by yourself, please wait for the official release. Sorry I can't get and discuss more detailed information about this, but the good news is that the official i3c_dma driver will be released in the next SDK version.
Best regards,
Gavin
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Hi @jzipperer206 ,
Thanks for your interest in NXP MIMXRT series!
It's true that the current I3C example project in the RT685 SDK doesn't provide a DMA method, but a very good speed can be achieved using the SDR mode. Also, the documentation you mentioned is a very good reference!
Best regards,
Gavin
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Typical i3c transactions i'm doing involve writing a 1-byte register address to a chip, followed by a repeated start, and then reading x bytes of data, where x can be 1 to 2048.
Is writing a 1-byte register address possible with the Master Message Mode? The LEN field of MWMSG_SDR_CONTROL says:
The byte length of the message. If LEN=0, then only END is used (and it will not - use the address if STOPped). LEN=1 should not be used; the minimal LEN size is 2 bytes (LEN=2)
Why is LEN=1 not allowed, and how can I accomplish this type of transaction? Thanks!
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Hi @jzipperer206 ,
Hope you are doing well!
I asked the internal team and there are a few bugs in the I3C DMA for RT6xx and RT5xx so they are not yet available to the public, therefore it is not recommended to do the porting by yourself, please wait for the official release. Sorry I can't get and discuss more detailed information about this, but the good news is that the official i3c_dma driver will be released in the next SDK version.
Best regards,
Gavin
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Hi I am wondering about the current status of i3c dma support. you mentioned it will be in the next official sdk. do you have a timeline of when that will be? thanks!