RT600 FlexSPI extra clk when reading using LoopbackFromSckPad or DQS

[DanielNis]

Running example evkmimxrt685_flexspi_octal_polling_transfer, on EVK685
Running from RAM, semihost for debug.

When running command Read Jedec ID, opcode 0x9F in SPI 1-1-1 for read 3 bytes,
when using kFLEXSPI_ReadSampleClkLoopbackFromSckPad or kFLEXSPI_ReadSampleClkExternalInputFromDqsPad, extra byte is read, while when using kFLEXSPI_ReadSampleClkLoopbackInternally, only requested 3 bytes are read.

see attached logic capture, and source code:

kFLEXSPI_ReadSampleClkLoopbackFromSckPad, 4 bytes are read, while requesting only 3:

kFLEXSPI_ReadSampleClkLoopbackInternally, only 3 bytes are read:

  

[stollg]

Hi,

I'm facing the exact same problem. When reading 32bit from FPGA over QSPI. It works using the "kFLEXSPI_ReadSampleClkLoopbackInternally" read strobe. The LUT entry is the following:
 - kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 12 /* bits */
 - kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 1 /* cycles */
 - kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 4 /* bytes */
 - kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0

It writes the 12bit address: 3*4bits, then 1*4bits of dummy cycle, following with 32bit = 8*4bit read data.
This is a sum of 3+1+8=12 SCK clocks in SDR mode

When enabling "kFLEXSPI_ReadSampleClkExternalInputFromDqsPad" an additional 6 SCK clocks are appended after the read data clocks and before CS is asserted high. The read data is valid, but we lose 50% of our throughput.

Is there any solution to this problem?

[Omar_Anguiano]

Verify that the ROM API and LUT (Lookup Table) configurations are correct. The LUT entries should match the expected command sequences for your flash memory.
The extra read might be dummy cycles from the LUT.

On the configuration on the kFLEXSPI_ReadSampleClkExternalInputFromDqsPad the device expects external DQS signal provided from the memory so if it is not supplied then errors on the comunication is expected. 

Best regards,
Omar

[DanielNis]

Hi Omar,

The LUT match expected operands and sequence.
Your answer doesn't explain why on using RT685EVK with FlexSPI example, setting 
#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackInternally

or:
#define EXAMPLE_FLEXSPI_RX_SAMPLE_CLOCK kFLEXSPI_ReadSampleClkLoopbackFromSckPad

with same operation sequence, 
with ClkLoopbackFromSckPad settings, we are getting extra 8 clocks, which is the failure,
and with ClkLoopbackInternally settings, clock count is as expected.

see attached pictures, and zip files with source code using evkmimxrt685_flexspi_octal_polling_transfer_cm33 example.

Please escalate this issue to R&D.

LUT_statusSrc_Clk_LoopbackFromSckPadSrc_Clk_internally

Best regards,
Dan