Again in SDK14.0, flexspi peripheral drivers 2.5.0.
The TX and RX watermark value in the config tool represents the final value of the TXWMRK and RXWMRK field in the IPTXFCR and IPRXFCR register.

For example, I should set the value to 7 in the config tool if I want a 64 Bytes (512 bits) watermark, and the following init code will be generated.
const flexspi_config_t FLEXSPI2_config = {
......
.txWatermark = 7U,
.rxWatermark = 7U,
......
};
But the FLEXSPI_Init function in the fsl_flexspi driver actually accepts the target byte value, then it calculates the final register value by itself. That means I should set the config->tx/rxWatermark value to 64 instead of 7 if I want a 64 Bytes (512 bits) watermark.
/* Configure IP Fifo watermarks. */
base->IPRXFCR &= ~FLEXSPI_IPRXFCR_RXWMRK_MASK;
base->IPRXFCR |= FLEXSPI_IPRXFCR_RXWMRK((uint32_t)config->rxWatermark / 8U - 1U);
base->IPTXFCR &= ~FLEXSPI_IPTXFCR_TXWMRK_MASK;
base->IPTXFCR |= FLEXSPI_IPTXFCR_TXWMRK((uint32_t)config->txWatermark / 8U - 1U);
Even worse, if the config->tx/rxWatermark value is between 0 and 7, the result of the expression will be 0-1=-1, causing the final value of the TXWMRK and RXWMRK field to be 5'b11111 (256 Bytes watermark), which is greater than the IP TX/RX FIFO size (128 Bytes). That prevents the reading and writing process by the IP bus from working correctly.