RT1062 JTAG Debugging

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RT1062 JTAG Debugging

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mike-dekoker
Contributor II

Hello all. We are having some issues connecting to the RT1062 in JTAG mode using a J-Link Plus. We are seeing this both in our custom hardware and on the NXP MIMXRT1060-EVK development board.

For our custom hardware, the RT1062 is the only device in the JTAG chain. We have verified TDI, TMS, TCK, JTAG_MOD, and RESET are all connected with 3V logic levels and are toggling/set appropriately, but nothing ever comes out of the RT1062 TDO.

When using the development board, we disconnect jumpers J47 and J48 per the user manual for JTAG operation. This is a brand new out-of-the-box development board with jumper J1 set to 3-4 for input power on J9. Connection fails in the same manner as our custom hardware. Please see below for connection failure output.

At this point, we don’t suspect a problem with our hardware since the development board is doing the same thing. We tried several versions of J-Link software: version 6.46g (the latest version) and v6.42b (the version shipped with latest MCUXpresso). We’ve also tried two different J-Link Plus debug probes, both of which work with other SWD/JTAG setups using NXP LPC43xx MCUs.

I'm not looking for help with our custom hardware, but it would be great if someone could help us figure out why JTAG mode isn’t working with the NXP development board. I should note that with the development board we can connect and debug in SWD mode just fine, the problem is only with JTAG mode. We cannot use SWD mode for our hardware because we will have multiple NXP MCUs in the JTAG chain.

Below is the J-Link connection failure output. The output is the same between our hardware and dev board. Only the device name is different because we use a different package.

J-Link>connect
Please specify device / core. <Default>: MIMXRT1062XXX6A
Type '?' for selection dialog
Device>
Please specify target interface:
 J) JTAG (Default)
 S) SWD
 T) cJTAG
TIF>
Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
JTAGConf>
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "MIMXRT1062XXX6A" selected.
 
Connecting to target via JTAG
InitTarget() start
InitTarget()
Connect Under Reset
Connect Under Reset
InitTarget() end
TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
InitTarget() start
InitTarget()
Connect Under Reset
Connect Under Reset
InitTarget() end
TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
InitTarget() start
InitTarget()
Connect Under Reset
Connect Under Reset
InitTarget() end
TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
InitTarget() start
InitTarget()
Connect Under Reset
Connect Under Reset
InitTarget() end
TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
Cannot connect to target.

Thanks for your time.

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike DeKoker,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
The JTAG debug mode is disabled default, you need to assert the DAP_SJC_SWD_SEL bit to enable the feature.

pastedImage_21.png
Note that, the JTAG_MOD should be pull-down by use 4.7 kΩ or tie to GND, other pins don't need to add a pull-up or pull-down resistor.
Have a great day,
TIC

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Gamma_qin
Contributor I

Hello Jeremy

   I also meet this issue when I use Segger JTAG Prob to connect the target MIMXRT1062DVL6A on MIMXRT1060_EVK. The configuration same as above. And I also have configured the "eFuse Operation Utility" , and all the connection and power supply same as you suggestion but unfortunatelly the JTAG connection still failed! could you please help me to solve this issue, thanks in advance!

 

Gamma_qin_1-1685585598454.png

Gamma_qin_2-1685585713110.png

 

 

Gamma_qin_0-1685585554670.png

 

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike DeKoker,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
The JTAG debug mode is disabled default, you need to assert the DAP_SJC_SWD_SEL bit to enable the feature.

pastedImage_21.png
Note that, the JTAG_MOD should be pull-down by use 4.7 kΩ or tie to GND, other pins don't need to add a pull-up or pull-down resistor.
Have a great day,
TIC

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mike-dekoker
Contributor II

Hello Jeremy,

Thank you for your reply. That explains why JTAG is not working for us.

Just so I understand correctly, in order to enable JTAG debug mode I have to write the DAP_SJC_SWD_SEL bit. In order to write this bit I must have code running on the processor. In order to run code on the processor I have to establish a JTAG connection to it. Am I missing something here? Do you see the problem with this?

Regards,

Mike DeKoker

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike DeKoker,

Thanks for your reply.
It's not necessary to run a demo to write the DAP_SJC_SWD_SEL bit actually, I'd like to suggest utilizing the NXP-MCUBootUtility tool which provides graphical UI for the developer to burn the eFuse area (Fig 1), and you can learn more information about the tool via below link.

pastedImage_13.png

NXP-MCUBootUtility tool:

https://github.com/JayHeng/NXP-MCUBootUtility


Have a great day,
TIC

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mike-dekoker
Contributor II

Hello Jeremy,

This is good news, thank you. Our hardware includes the USB interface so we should be able to go that route. Thank you for your time and help, it is greatly appreciated.

Regards,

Mike.

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