QSPI flash access while in XIP mode

[jacquessamoun]

Hello,

I know this same question is found at several instances, but none seem to match my case:

My application is running in XIP mode (iMXRT1170) in an external Quad NOR flash. However, using littleFS, i want to use a portion (say the upper blocks) of this flash to be handled by LittleFS. As such is it working correctly ... but i noticed that all the "final" fsl_flash_..." functions are using Blocking Transfer (of course, all of those functions are relocated to internal RAM so they can access the flash "from the outside".

Now i am trying to use eDMA transfer instead of blocking transfer, to solve my RT issues. I inspired from the SDK example "mimxrt1170evkb" which works perfectly, but runs out of SDRAM of RAM.

Despite all my efforts, I am not able to do it reliable, i mean that it would sometiomes works for 1 or 2 page writes, but then gives random hardfaults, etc ... my gut feeling says that this is linked to the fact my app runs XIP (although the flash routines are not), cache issues, etc ...

Can anyboby point me to some designe rules, code examples, etc ... for doing this ? Of course, i would like to use eDMA in full, which is not polling on the dmaDone flag, but really getting an interrupt, so i can alleviate the R/T at most

Thanks,

Jacques

[jacquessamoun]

Hi Omar,

i carefully read the AN ... and i am a bit puzzled.

It seems to say that the only way of doing RWW is either to use 2 flash components (i have only one) and use RWW capable flashes (our model is not capable). That is to say that, i can do only "blocking transfer" (like in the SDK example) and suffer the length of the page write with the interrpupts disabled. In my application, this is definitely not acceptable

On the other hand, if I read the figure 5, you are saying that the page transfer time would be about 6 us ... and still the SPI is stalled while the transfer is taking place. Even the "DMA transfer complete" is polled. What i don't understand is that, if we stall the pending flexSPI transation during the page program, and of course if all the flash writing functions are remapped to internal SRAM, what is then the advantage of using 2 separate components ?

Bare with me, there is probably something basic i do not understand here

Thanks,

Jacques

[jacquessamoun]

Hello Omar, 

was out a couple of days .... i see you point, and started looked at the AN. This really sounds identical to my config. I need to further read a bit, then i will update

[Omar_Anguiano · Accepted solution]

Hello
I hope you are well.

You will be limited by the XIP as flash cannot be acceded while XIP is enabled. You might refer to this application note to improve this: Implement RWW on i.MX RT Series (nxp.com)

Best regards,
Omar