Problem with sample lwip and OCRAM

[samsaprunoff]

Good day All,

I have imported the RT1021's SDK lwip_udpecho_bm example and this works fine with the original settings (e.g Flash and SRAM_DTC).  However, as I added more functionality I ran out of DTC ram and so I modified the project mcu settings such that the SRAM_OCRAM was used (e.g. moved SRAM_OCRAM up in the MCU Settings).  The application compiled fine and revealed that indeed the OCRAM was being used:

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:       95888 B         8 MB      1.14%
         SRAM_OC:       62528 B       128 KB     47.71%
        SRAM_DTC:          88 B        64 KB      0.13%
        SRAM_ITC:          0 GB        64 KB      0.00%
     BOARD_SDRAM:          0 GB        32 MB      0.00%
Finished building target: evkmimxrt1020_lwip_udpecho_bm.axf

When I rerun the application it does not respond to UDP packets.  if I ping the target most times the pings do not respond and if they do it only responds to 2 pings and then no more.

Before I start digging into this further I thought I would ask to see if anyone has come across this issue and why does it only become a problem when OCRAM is used?

Thanks in advance!

Cheers,

Sam

[danielchen]

Hi  samsaprunoff ：

In cases you are using OCRAM as your main RAM, For LwIP I would suggest you put some key data structures to SRAM_DTC or other non-cacheable region.

Regards

Daniel

[samsaprunoff]

Good day Daniel,

Thank you for your response!

There is some data that is already being stored in DTC, as indicated by the compile results:

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:       95888 B         8 MB      1.14%
         SRAM_OC:       62528 B       128 KB     47.71%
        SRAM_DTC:          88 B        64 KB      0.13%
        SRAM_ITC:          0 GB        64 KB      0.00%
     BOARD_SDRAM:          0 GB        32 MB      0.00%
Finished building target: evkmimxrt1020_lwip_udpecho_bm.axf

Would you have any suggestions as to what other lwip data needs to be stored in DTC? 

Cheers,

Sam

[danielchen]

Hi  samsaprunoff:

ENET buffers need to store in SRAM_DTC

Original definition:(enet_ethernetif_kinetis.c)

    SDK_ALIGN(static rx_buffer_t rxDataBuff_0[ENET_RXBD_NUM], FSL_ENET_BUFF_ALIGNMENT);

    SDK_ALIGN(static tx_buffer_t txDataBuff_0[ENET_TXBD_NUM], FSL_ENET_BUFF_ALIGNMENT);

Change to:

  AT_NONCACHEABLE_SECTION_ALIGN(static rx_buffer_t rxDataBuff_0[ENET_RXBD_NUM], FSL_ENET_BUFF_ALIGNMENT);

  AT_NONCACHEABLE_SECTION_ALIGN(static tx_buffer_t txDataBuff_0[ENET_TXBD_NUM], FSL_ENET_BUFF_ALIGNMENT);

Regards

Daniel

[samsaprunoff]

Good day Daniel,

Excellent, thank you for this great info!

Cheers,

Sam

[samsaprunoff · Accepted solution]

Good day All,

I reviewed the same FreeRtos version of the bm example (evkmimxrt1020_lwip_udpecho_freertos) and here I found some examples of where caching is needed and/or disabled in order to have lwip working.   As a consequence I will use this example as a reference for I need and so I think this answered my question

Cheers,

Sam