[MIMXRT1040EVK] Help on Routing QTMR inputs through XBARA

[vdpsr]

Hi everyone,

I’m new to NXP devices (this is my first post), but I have good experience with MCUs. Right now I’m using the MIMXRT1040-EVK board.

My goal is to use the QTMR in quadrature mode to read two incremental rotary encoders at the same time. I’ve read the reference manual, tried many settings, and made some progress — but I’m stuck when using the XBAR INOUT pins.

What works

I can route the encoder signals to the QTMR timer inputs using either direct pins or XBAR IN signals (like XBAR1_IN22, XBAR1_IN23, etc.). The QTMR counts correctly, and UART shows both encoders working.

Here’s the setup in BOARD_InitPins() that works:

CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Xbar1); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_XBAR1_IN22, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_XBAR1_IN23, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_XBAR1_IN24, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_15_XBAR1_IN25, 0U); IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 & (~(IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL_MASK))) | IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER1_TRM3_INPUT_SEL(0x01U) ); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn25, kXBARA1_OutputQtimer1Tmr0Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn24, kXBARA1_OutputQtimer1Tmr1Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn23, kXBARA1_OutputQtimer1Tmr2Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn22, kXBARA1_OutputQtimer1Tmr3Input);

What doesn’t work

If I try to use XBAR INOUT pins instead, the QTMR doesn’t get valid signals. I see no counts. I think I’m missing a config step for the INOUT function, but I couldn’t find clear info in the docs.

Here’s my INOUT attempt:

CLOCK_EnableClock(kCLOCK_Iomuxc); CLOCK_EnableClock(kCLOCK_Xbar1); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06, 0U); IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07, 0U); IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_XBAR1_INOUT04, 0x10B0U); // Not sure if needed IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_XBAR1_INOUT05, 0x10B0U); // Not sure if needed IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_XBAR1_INOUT06, 0x10B0U); // Not sure if needed IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_XBAR1_INOUT07, 0x10B0U); // Not sure if needed IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 & (~(IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK))) | IOMUXC_GPR_GPR6_QTIMER4_TRM0_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER4_TRM1_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER4_TRM2_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_QTIMER4_TRM3_INPUT_SEL(0x01U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(0x00U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(0x00U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(0x00U) | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(0x00U) ); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout05, kXBARA1_OutputQtimer4Tmr0Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputQtimer4Tmr1Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout07, kXBARA1_OutputQtimer4Tmr2Input); XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout04, kXBARA1_OutputQtimer4Tmr3Input);

My questions

1. Has anyone used XBAR INOUT pins with QTMR in quadrature mode on the mimxrt 1040 evk (or similar i.MX RT boards)?

2. Is there a setup step I’m missing ?

3. Are there known limits when using XBAR INOUT for QTMR inputs?

Summary

• Board: MIMXRT1040-EVK

• Goal: Read two encoders with one QTMR

• Works: Routing through XBAR IN

• Doesn’t work: Routing through XBAR INOUT

Any tips, examples, or references would really help. Thanks!

[vdpsr · Accepted solution]

Hi ! 

My bad, I did not see those DNP (not mounted) 0ohms on the MIMXRT1040EVK board !

This subject can be resolved now

My project works now as expected.

Big thanks to NXP support for pointing out this detail !

See you !