Board - iMXRT1040-EVK, SDK - mcuXpresso SDK v25.03.00
Hi,
I am working on my custom application which uses FlexSPI. I followed the "flexspi/nor/edma" example to develop my code. The example is working fine on the EVK, both from XIP and RAM.
My application is working fine only when I run it from RAM, but from XIP the behaviour is erratic. In the init function sometimes it hangs in this while loop.
/* Waiting for bus idle only when FLEXSPI enabled. */
if ((base->MCR0 & FLEXSPI_MCR0_MDIS_MASK) != FLEXSPI_MCR0_MDIS_MASK)
{
/* Make sure flexspi bus idle before change its clock setting. */
while (!FLEXSPI_GetBusIdleStatus(base))
{
}
}
When I step debug through the while loop, it hangs or crashes at:
FLEXSPI_Init(base, &config);
My application is using FreeRTOS. I have tried calling the init function from main() before starting the scheduler, as well as from a thread. It uses other peripherals like CAN, SPI but I have disabled them, still I see the same behaviour.
Below is my clock configuration called from main()
static void clockInit(void)
{
/* Enable the external 24 MHz oscillator. */
CLOCK_SetXtalFreq(24000000U);
CLOCK_InitExternalClk(0);
CLOCK_SwitchOsc(kCLOCK_XtalOsc);
/* The PLL3 480 MHz clock (aka USB1 PLL) is derived from the
external oscillator with a fixed multiplier of 20. */
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); /* 0 = Derive from main clock */
/* The UART clock is derived from PLL3, with a static divider of 6
plus a variable divider of 1. */
CLOCK_DisableClock(kCLOCK_Lpuart1);
CLOCK_SetDiv(kCLOCK_UartDiv, 0); /* 0 = Divide by 1 */
CLOCK_SetMux(kCLOCK_UartMux, 0); /* 0 = Derive from PLL3 */
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
/* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
}
What is the issue here? I need some ideas on what I should be trying to find the issue.
Thanks
I debugged further and found that the erase and write commands are crashing (HardFault) in continuous run mode only. If I step debug through these functions then they work. The read command is working fine for me, I am able to read and print the values.
Any suggestions what might be the issue with erase and write? I am still confused how these are working in step debug mode.
Regards
Hi ,
Completely referencing the project in the SDK should be unlikely to result in the situation you describe, check a few key points:
DCACHE/ICACHE handling should be consistent with that in the SDK;
ENABLE_RAM_VECTOR_TABLE macro is properly configured;
Best regards,
Gavin
Hi @rd24 ,
Thanks for your interest in NXP MIMXRT series!
You can find this folder in the project file of the SDK example:
It controls the linkfile generated by the IDE, resulting in the following final generated image:
That is, even though the project is XIP, the FlexSPI related code is still executed in RAM.
Best regards,
Gavin
Hi @Gavin_Jia ,
I am using the armgcc SDK on Linux, so I modified my linker script as per "MIMXRT1042xxxxx_flexspi_nor.ld". Now if I step debug through the application it works fine. I am able to initialize, then read, program and erase. But if I run the program crashes, i.e. HardFault_Handler gets called at "FLEXSPI_SoftwareReset()" inside the init function.
Any idea what could cause the program to crash?