External data Flash SPI

[marcos_chiele]

Hello All.

I am trying to communicate an RX1051 microcontroller with an external data flash through SPI.

Actually, communication is working well, I am able to send a command and receive the answer.

However, when I try to send a sequence of bytes to write a page (usually 256 bytes), the communication is interrupted after some bytes.

I checked the SDK example, but in the example, the CS is changed after each byte, it can not occur to me. The CS must be down before the first byte and must be high only after the last byte.

can you give me some help?

[victorjimenez]

Hello Marcos, 

Unfortunately, it is not possible to modify this functionality of the chip select signal. As a workaround, you can use a normal GPIO instead of the chip select of the module. This way you can manually send the signal to low and sending it high until you finish sending the data. Keep in mind that when you do this, you have to verify that this signal will fulfill the timing parameters that your memory is expecting. 

Have a great day,

Victor

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[Masmiseim]

Hello,

I think with setting the CONTC Flag in the TCR register you should be able to keep the chip select Signal low.

Best regards

[marcos_chiele]

Hello guys, thanks for the tips.

Actually, I did some tests with TransferBlocking function, and it's working well.

I configured the xfer struct with the flag "kLPSPI_MasterPcsContinuous". The CS is not going high during the transfer, so its ok for me.

Now, a new problem is occurring.

When I try to read some data array from my external memory, if the size is "big", a hard fault is occurring. I am reading only 32 bytes each time. If I try to read 64 bytes, hard fault...

Do you have some ideas about that?

[victorjimenez]

Hello Marcos, 

I'm glad to hear that the chip select problem is fixed now!

Regarding the new behavior that you are facing, could you please provide more information about the hard fault that you are getting? Are you able to track this issue in the debug session to see where exactly this hard fault is happening? What is happening with the SPI bus once the hard fault occurs? Also, if you could explain how you are reading the 64 bytes it would be really helpful.

Sorry for the multiple questions but since I cannot reproduce this behavior on my end, I need to have as much information as possible to try to find the root cause of this behavior.

Regards, 

Victor 

[marcos_chiele]

Hello Victor.

Actually I was using the RX and TX buffers with different sizes.

Using them with the same size, it's working fine now.

Thank you very much.

Marcos Roberto CHIELE

Valeo Thermal Bus Systems

Development Engineer

Valeo Climatização do Brasil – Veículos Comerciais S/A

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On Thu, Jun 25, 2020 at 8:44 PM victorjimenez <admin@community.nxp.com>