Does the i.MX RT 1024 have a new FlexSPI errata?

[mjbcswitzerland]

Hi

Looking at the i.MX RT 1024 startup code I see that there is something new in comparison to other parts.

The flash configuration sets a slower speed with the FlexSPI clock looped back internally instead of on the DQS pad as is the typical case.

In the startup code this is then modified using the following method:

#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)

    /* Configure FLEXSPI_A_DQS */
    IOMUXC -> SW_MUX_CTL_PAD[86] = IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_SION(1);

    /* Disable I cache */
    if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR))
    {
        SCB_DisableICache();
    }

    /* Re-Configure FLEXSPI NOR via ROM API, for details please refer to the init function of ROM FLEXSPI NOR flash
       driver which is in fsl_romapi.h and fsl_romapi.c in the devices\${soc}\drivers directory of SDK package */
    uint8_t flexspi_nor_config[512];
    memcpy((void *)flexspi_nor_config, (void *)FLASH_CONFIG_ADDRESS, sizeof(flexspi_nor_config));
    flexspi_nor_config[12] = 1U;  /* kFLEXSPIReadSampleClk_LoopbackFromDqsPad */
    flexspi_nor_config[70] = 7U;  /* kFLEXSPISerialClk_133MHz */

    flexspi_nor_init_t  flash_init = (flexspi_nor_init_t)ROM_FLASH_INIT_ADDRESS;
    flash_init(0U, flexspi_nor_config);
#endif /* #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) */

So I checked the errata to this part and find that its errata is identical to the i.MX RT 1021 (no more and no less errata).

Therefore the question - why is this round-about technique needed to achieve the full speed and correct pad setting if it is not a characteristic of the silicon version - and should there be an errata explaining why?

Thanks

Regards

Mark