Hi NXP,
I'm currently working with the i.MX RT1010 MCU and have enabled both OTFAD and HAB to secure the firmware image. The external flash used is Renesas AT25SF321B.
Could you confirm whether the ROM code includes any mechanism that may trigger Non-Volatile Protection on the flash device ?
For instance, unauthorized or abnormal access attempts to the flash memory?
Hi @Omar_hong ,
What is the end application like? with both OTFAD and HAB enabled the application image on the flash is already well protected by ROM code, but I think you are referring to the access protection to flash device, right? Indeed, ROM code has no such kind of API, but the RT1010 has CSU module can be used to setup the access right. Please kindly refer to the following for details.
Have a great day,
Kan
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Hi @Kan_Li
I noticed that certain settings in the MCUXpresso Secure Provisioning Tool appear to influence the configuration of flash registers. Based on our previous experience, we’ve adjusted the flash frequency by first writing the configuration into flash, which the ROM code then uses to set the operating frequency. It seems that enabling Quad mode can follow a similar flow.
While configuring Quad mode, we observed that setting Bit 6 of Status Register 2 also enables Non-Volatile Protection. We're speculating whether a specific configuration parameter might be responsible for triggering Non-Volatile Protection as well.
Additionally, in the lower-left section of the screenshot, the MCUXpresso Secure Provisioning Tool appears to offer a flash protection feature. Could you clarify whether this protection mechanism leverages the native capabilities of the flash device itself, or is it implemented through NXP’s software-based security framework?
Hi @Omar_hong ,
For such kind of support, Boot ROM needs the parameters from FCB, you need to add this configuration command in the FCB and tell the ROM issues this command out of POR. The following part of FCB is used for that purpose.
Have a great day,
Kan
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Note:
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- We are following threads for 7 weeks after the last post, later replies are ignored
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