Changing the IPG clock

[ulrich_sorensen]

Hi,

I would like to change the IPG clock (IPG_PODF) on the iMX RT1064 while IPG clock is running. The reference manual states the following.

14.6.1.5.5 Divider change handshake
Modifying the following dividers will start the handshake .
• periph_clk_sel
• arm_podf
• ahb_podf
The dividers listed above are designed with a handshake. For dividers without a
handshake design, the following sequence must be performed when updating PODF
value:
1. Gate the output clock off before updating PODF value.
2. Gate the output clock on after the PODF value is updated and stable.
To update the PODF value without gating the output clock off will cause unpredictable
results such as no clock output.

However, in one of the examples (demo_apps/power_mode_switch) the IPG clock is not gated before changing the IPG_PODF divider (see below). Have I missed something in the example or is clock gating not necessary?

case LPM_PowerModeLPIdle:
            CLOCK_SET_DIV(kCLOCK_PeriphClk2Div, 0);
            CLOCK_SET_MUX(kCLOCK_PeriphClk2Mux, 1); // PERIPH_CLK2 mux to OSC
            CLOCK_SET_MUX(kCLOCK_PeriphMux, 1);     // PERIPH_CLK mux to PERIPH_CLK2
            /* Set PLL3 PFD0 BYPASS output directly */
            CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_BYPASS_MASK;
            CCM_ANALOG->PLL_USB1_SET = CCM_ANALOG_PLL_USB1_ENABLE_MASK;
            CCM_ANALOG->PFD_480_CLR  = CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK;
            CLOCK_SET_DIV(kCLOCK_Flexspi2Div, 0);
            CLOCK_SET_MUX(kCLOCK_Flexspi2Mux, 1); // FLEXSPI2 mux to PLL3 PFD0 BYPASS
            /* CORE CLK to 24MHz and AHB, IPG, PERCLK to 12MHz */
            CLOCK_SET_DIV(kCLOCK_PerclkDiv, 0);
            CLOCK_SET_DIV(kCLOCK_IpgDiv, 1);
            CLOCK_SET_DIV(kCLOCK_AhbDiv, 0);
            CLOCK_SET_MUX(kCLOCK_PerclkMux, 0); // PERCLK mux to IPG CLK
            break;

BR/

Ulrich

[victorjimenez]

Hi Ulrich, 

What version of the SDK are you using? I just referred to the example power_mode_switch from version 2.8.2 and I wasn't able to find the code that you mentioned. If you are using an oldest version, please migrate to version 2.8.2.

Regards, 

Victor 

[ulrich_sorensen]

Hi,

SDK is 2.8.2

Full path of file: SDK_2.8.2_EVK-MIMXRT1064/boards/evkmimxrt1064/demo_apps/power_mode_switch/specific.c

Function: void SwitchSystemClocks(lpm_power_mode_t power_mode)

BR

Ulrich

[victorjimenez]

Hi Ulrich, 

Thanks for sharing more information about it. You are right, the reference manual says one thing but the example of the SDK does another thing. I'm currently checking this internally, I will give you an update as soon as possible. 

Regards, 

Victor 

[victorjimenez]

Hi Ulrich, 

The IPG clock change frequency very quickly compared to the clocks were the handshake has been implemented. So that reduces the risk of problems. The IPG clock is used by almost every peripheral on the chip for register accesses. There are only a handful of peripherals that use it as a functional clock. Ideally, you would gate peripherals while changing the clock, but for IPG clock this would require gating almost every peripheral on the chip, which isn't very practical to implement. Because the SDK isn't attempting any register access to any peripherals other than CCM while doing the clock switch, the sequence doesn't cause an issue. 

Have a great day,

Victor

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