Bring up of custom RT685 board

[Hthornburgh]

Hello,

I am trying to bring up our custom DSP board with the RT685. I am following this article here, https://community.nxp.com/t5/Blogs/i-MX-RT685-SuperMonkey-QSPI-Bring-up-with-MCUXpresso-and-Segger/b...

but am having issues flashing to the device. I am using a MCU-Link Debug Probe in CMSIS/DAP mode and get this issue when trying to flash a modified version of hello_world demo.

We are using a QSPI by Infineon pn: S25FL256SDPMFV001

I am getting an error that states: "Dynamic flash driver startup failed to provide flash parameters"

Here is what my boot header looks like

/*
 * Copyright 2020 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
#include "flash_config.h"
#include "board.h"

/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flash_config"
#endif

/*******************************************************************************
 * Code
 ******************************************************************************/
#if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1)
#if defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".flash_conf")))
#elif defined(__ICCARM__)
#pragma location = ".flash_conf"
#endif

const flexspi_nor_config_t flexspi_config = {
    .memConfig =
        {
            .tag                 = FLASH_CONFIG_BLOCK_TAG,
            .version             = FLASH_CONFIG_BLOCK_VERSION,
            .csHoldTime          = 3,
            .csSetupTime         = 3,

            .waitTimeCfgCommands = 1,

            .controllerMiscOption =
                (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
            .deviceType    = 0x1,
            .sflashPadType = kSerialFlash_4Pads,
            .serialClkFreq = kFlexSpiSerialClk_SDR_48MHz,
            .sflashA1Size  = 0x1000000,
            .sflashA2Size  = 0,
            .sflashB1Size  = 0,
            .sflashB2Size  = 0,
            .lookupTable =
                {
                    /* Read */
                    [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
                    [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

                    /* Read Status */
                    [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

                    /* Write Enable */
                    [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00),

                },
        },
    .pageSize           = 0x100,
    .sectorSize         = 0x1000,
    .ipcmdSerialClkFreq = 1,
    .blockSize          = 0x10000,
};
#endif /* BOOT_HEADER_ENABLE */

I am unsure if i need to modify the bootheader more, as this is just a copy of the example from Super Monkey, or if maybe I'm not using the correct driver for the QSPI? Any suggestions? 

[jay_heng]

You need a unit test project to access this S25FL256. I will add RT600 target project in my RT-MFB

https://github.com/JayHeng/RT-MFB

[Hthornburgh]

Hey Jay, would you be able to add the RT600 target project for MCUXpresso? We are still struggling with the initial bring-up. Thank you!

[VCT]

Hi Jay, I'm a colleague of Hthornburgh. Just realized that RT-MFB is currently an IAR project, after failing to import it in MCUXpresso yesterday.

Would you mind adding project files for MCUXpresso to RT-MFB repo?

[Hthornburgh]

Also is there any documentation anywhere that contains instructions for building with these tools?

[Hthornburgh]

Thank you, will you please let me know when you add the RT600 target project? I don't think I saw it in the link there.

[jay_heng]

Will add RT600 target this week.

[Hthornburgh]

Here are some changes we've implemented in our bootheader. Can someone provide feedback on the questions within and advise if this looks like a bootheader issue or a driver issue?

/*
 * Copyright 2021 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
#include "flash_config.h"

/* Hardware info:

  S25FL256SDPMFV001

  S25FL 256 S DP M F V 0 0 1
         |    |          |
        32MB 66MHz       |
                        uniform 64 kB sectors
  
  flash size = 32MB
  program buffer size = 512B
  erase sector size = 256kB
  erase block size = 32MB (whole device)

  t_css CS setup time = 3ns
  t_csh CS hold time = 3ns
*/

/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flash_config"
#endif

/*******************************************************************************
 * Code
 ******************************************************************************/
#if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1)
#if defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".flash_conf"), used))
#elif defined(__ICCARM__)
#pragma location = ".flash_conf"
#endif

const flexspi_nor_config_t flexspi_config = {
    .memConfig =
        {
            .tag                  = FLASH_CONFIG_BLOCK_TAG,
            .version              = FLASH_CONFIG_BLOCK_VERSION,
            .csHoldTime           = 3,           // OK
            .csSetupTime          = 3,           // OK
            .configCmdEnable      = 0,
            .controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
            .deviceType           = 0x1,         // FIXME!!! NOT SFDP COMPATIBLE, WHAT GOES HERE??
            .sflashPadType        = kSerialFlash_4Pads,          // OK
            .serialClkFreq        = kFlexSpiSerialClk_SDR_24MHz, // OK
            .sflashA1Size         = 0x2000000U,  // CHANGED
            .sflashA2Size         = 0,           // OK
            .sflashB1Size         = 0,           // CHANGED
            .sflashB2Size         = 0,           // OK
            .lookupTable =
                {
                    /* Read */
                                       // cmd0,    pad0,         op0,  cmd1,      pad1,         op1
                    [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20), 
		                          // 1-bit-wide command value=0xEC
					  // 4-bit-wide read address length=32 bits
                    [1] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0x00, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
		                          // 4-bit-wide mode value=0x0
					  // 4-bit-wide dummy for 4 clocks
                    //[2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00),
                    [2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x02, STOP_EXE, FLEXSPI_1PAD, 0x00),
					  // 4-bit-wide read data length=2 bytes
					  // NOP

                    /* Read Status */

		    //FIXME: what fields does the driver need from status register? Reg format is likely different

                    //[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
                                               // cmd0,    pad0,         op0,  cmd1,     pad1,         op1
                    [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x01),
		                                  // 1-bit-wide command value=0x05
					          // 1-bit-wide read data length=1 byte

                    /* Write Enable */
                                               // cmd0,    pad0,         op0,  cmd1,     pad1,         op1
                    [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00),
		                                  // 1-bit-wide command value=0x06
					          // NOP

                    /* Sector erase */
                                               // cmd0,    pad0,         op0,  cmd1,      pad1,         op1
                    [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
		                                 // 1-bit-wide command value=0x21
					         // 1-bit-wide read address length=32 bits

                    /* block erase */
                                               // cmd0,    pad0,         op0,  cmd1,      pad1,         op1
                    [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xDC, RADDR_SDR, FLEXSPI_1PAD, 0x20),
		                                 // 1-bit-wide command value=0xdc
					         // 1-bit-wide read address length=32 bits

                    /* 4PP4B */
                    //[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x3E, RADDR_SDR, FLEXSPI_4PAD, 0x20),
                    [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x34, RADDR_SDR, FLEXSPI_1PAD, 0x20),
		                                  // 1-bit-wide command value=0x34
					          // 1-bit-wide address length=32 bits
                    [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00),
		                                  // 4-bit-wide write data length=0x4
					          // NOP

                    /* chip erase */
                    [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP_EXE, FLEXSPI_1PAD, 0x00),
		                                   // 1-bit-wide command value=0x60
					           // NOP
                },
        },
    .pageSize           = 0x200,     // CHANGED
    .sectorSize         = 0x10000,   // CHANGED
    .ipcmdSerialClkFreq = 1,         // OK (SPI controller setting, not flash)
    .blockSize          = 0x2000000  // CHANGED
};
#endif /* BOOT_HEADER_ENABLE */