About i.MX RT1170 Errata

[EMertCakir]

Hi

i.MX RT 1170 Rev. 1.6 - 24 October 2024 errata document, a revision suggestion is given as follows.
"For new or updated designs, use 1.8V mode (1.71-1.98V) for the FSGPIO power supply" and "For i.MX RT1170, GPIO_AD/GPIO_LPSR/GPIO_DISP_B2 banks are FSGPIO"

I understand this revision suggestion, but; Is this suggestion valid for every IO, whether FSGPIO is used or not, because it also says something like this in the continuation of the document."The power supply pins, NVCC_GPIO, NVCC_LPSR and NVCC_DISP2 should be connected to 1.8V mode"

In other words, all GPIO_AD pins that are selected for general purpose and are 3v3 in my design should be selected as 1v8. Even if there is no signal with FSGPIO in the GPIO_AD bank?

[andersrosvall]

NXP - will there be a new chip/mask revision of the iMX1170 family to solve the serious FSGPIO issue? There are many designs out in production that will eventually fail if this issue is not solved with a new chip/mask revision. 

If there will be a new chip/mask revision, when can it be expected?

[Masmiseim]

Hello @andersrosvall,

Please talk to your NXP-FAE or sales contact or your distributor about this topic, as the next steps are not yet publicly documented.

[EMertCakir]

Hi @andersrosvall
In the chip errata document there is a statement like "A fix will be implemented on the next i.MX RT1170 revision."
You can ask your suppliers when they will do this.

[Masmiseim]

Hello @EMertCakir,

check also the Technical Note “FSGPIO Failure Risk Assessment” (https://www.nxp.com/webapp/Download?colCode=TN00188)

If the signals you are using are all low-Speed Signals like I2C you shouldn’t also have any problems with 3V3

Regards

[EMertCakir]

Hello.

Thank you for the answer.
‘The power supply pins, NVCC_GPIO, NVCC_LPSR and NVCC_DISP2 must be connected to 1.8V mode’ then according to this sentence, if my IOs are not fast signal, there is no problem in feeding the power bank with 3V3.

[Masmiseim]

Exactly, high-frequency signals are problematic, in the technical note you will find detailed tables that illustrate this