This article provides a generic introduction related to the cryptographical algorithms and HW acceleration. By using i.MX RT117x with related hands-on examples, it aims at helping NXP customers to quickly understand how to use and make a well decision regarding the selection of cryptographic algorithms to use in their products and systems.
Note: TL, DR. If the reader has the basic knowledge of the cryptography, please skip to chapter 3.

A cryptographic accelerator is a co-processor designed specifically to perform computationally intensive cryptographic operations, there are different names from different chip manufactures. For NXP, ‘CASPER’ on LPC55xx series, but ‘DCP’ or ‘CAAM’ for i.MX and i.MX RT.
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i.MX RT
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Name
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Features
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i.MXRT10xx
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DCP (Data Co-Processor)
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Symmetric Engines: AES-128
Hash Engines: SHA-1, SHA-256
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i.MXRT11xx
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CAAM
(Cryptographic Acceleration and Assurance Module)
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Symmetric Engines: AES 128, 192, 256; 3DES, DES;
PKHA: RSA, ECDSA,DH,ECDH
Hash Engines: SHA-1, SHA-2, MD5, HMAC
Random Number Generation
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It shows cryptographic features and benchmark performance with 2 examples:
- Features: CAAM usage in mbedTLS.
- Performance: Benchmark of HW acceleration or software only

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CAAM
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Features
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Key Function APIs
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JobRing0
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kCAAM_Sha256
kCAAM_HmacSha1/sha224/384/512
kCAAM_Aes_cbc-128/192/256
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RunShaExamples(base,&caamHandle);
RunHmacExamples(base,&caamHandle);
RunAesCbcExamples(base,&caamHandle);
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JobRing1
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kCAAM_Aes_gcm
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RunAesGcmExamples(base,&caamHandle);
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JobRing2
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kCAAM_Aes_cbc
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RunAesCbcExamples(base,&caamHandle);
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JobRing3
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kCAAM_Aes_gcm
kCAAM_RNG
kCAAM_Red-Block
kCAAM_Black-Block
kCAAM_CRC
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RunAesGcmExamples(base,&caamHandle);
RunRngExample(base, &caamHandle);
RedBlobExample(base, &caamHandle);
BlackBlobExample(base, &caamHandle);
RunCrcExamples(base, &caamHandle);
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Key words: Cryptography, Cryptographic HW Acceleration, i.MX RT