porting nand driver in u-boot

[caohaifeng]

Hi, all,

I am porting nand driver in u-boot. The nand chip is MT29F2G16ABAE,it conneted with EIM_DA[15..0] of imx53. I have done these works:

1. initial I/O in board-sepcial file-------add setup_nfc() in <uboot>/../mx53_xx.c

2. add nand flash info in type_7[] in annd_device_info.c

    add nand driver setup in include/configs/mx53_xx.h,for example, #define CONFIG_SYS_NAND_BASE 0x40000000 etc.

    add #define CONFIG_FSL_ENV_ IN_MMC

when the board power up, the error show at the console info is

NAND: No NAND device found!!!

0 MiB

I found that someone say  we can add "printf" in drivers under u-boot to debug it. But it ouput nothing to me. And I tried "printk", there is no more infomation to output . I don't know how to debug it.

Can anyone help me?

Regards,

haifeng

[BrilliantovKiri]

Hello!

You should add NAND description in U-Boot and Linux, file drivers/mtd/nand/nand_device_info.c.

[caohaifeng]

Hello,kirill,

I have add nand info in uboot and linux, and I have checked nand_flash_ids[], it seems right.

but the problem  still exist.

NAND: No NAND device found!!!

0 MiB

Is there anything what I should do but I leave out ? sorry for my poor english.

[BrilliantovKiri]

Hello!

I see two posssible reason:

- you add NAND description in incorrect table, check this

- you have hardware problem, system can't read identifier from NAND

I think NAND debug can help you locate problem.

P.S. my english also not very good :smileywink:

[caohaifeng]

Hello,kirill,

I'm sure the hardware has no problem because I have tested it in kernel. That is to say I have made it drivers in kernel before, it works well. I can find it and read or write data in it .

Now , I want to boot custom board from nand flash, then I have this problem.

Can you describe the possible reason 1 in details?  I have checked the nand_device_info.c , this nand device info should be added in nand_device_info_table_type_7[], it seems there is nothing wrong.

Any more suggestions ?

Regards,

haifeng

[caohaifeng]

I debug it again , it must be problem of initilize fuction. The chip maf_id and device_id should be 0x2c and 0xca,

but the data return are both 0x27 . Let me check it further.

[weidong_sun]

Hello, Hai feng,

     Our NAND Flash controller doesn't support 16bit NAND Boot, The basic requirement for NAND device is 2k/4k per page , 8bit data IO.

Regards,

Weidong

[BrilliantovKiri]

Hello, Weidong!

This is not correct, I work with 16-bit NAND Micron MT29F2G16ABBEA, MT29F8G16ABBCA and MT29F8G16ADBDAH4.

[caohaifeng]

Hi,Kirill,

Can you send me a diff file ? My nand chip is MT29F2G16A.

Thank you.

[BrilliantovKiri]

Patch for u-boot 2009.08

[caohaifeng]

Thank you kirill.

The patch is only nand_device_info.c， I have no problem here.

Can you send me this diff file? directory is <uboot>/drivers/mtd/nand/

mxc_nand.c 

[BrilliantovKiri]

Hello!

I not edit it, but you can check NAND configuration in your board configuration file.

I use follow:

/* Support NAND */

#define CONFIG_CMD_NAND

#if defined(CONFIG_CMD_NAND)

        #define CONFIG_MXC_NAND

        #define CONFIG_SYS_NAND_MAX_CHIPS     8

        #define CONFIG_SYS_MAX_NAND_DEVICE    1

        #define CONFIG_SYS_NAND_BASE          0x40000000

        #define CONFIG_NAND_FW_16BIT    1 /* 1: 16bit 0: 8bit */

        #define CONFIG_CMD_FLASH

        #define CONFIG_MTD_NAND_VERIFY_WRITE

        /* ATTENTION: both NAND have same identificator */

        /* use MT29F8G16ABBCA (8Gb, x16, 1.8V) */

        /* #define CONFIG_USE_MT29F8G16ABBCA */

        /* use MT29F8G16ADBDAH4 (8Gb, x16, 1.8V) */

        #define CONFIG_USE_MT29F8G16ADBDAH4

#endif

[caohaifeng]

Hello,kirill,

There are some differences between us.

1. #define CONFIG_SYS_NAND_BASE ，the nand flash address of imx53 should be 0xF7FF0000，I don't know why you use as  0x40000000, although mx53_evk is also 0x40000000.

2. I can't find those definition in imx53 bsp for imx5 cpu.

        #define CONFIG_CMD_FLASH

        #define CONFIG_MTD_NAND_VERIFY_WRITE

3. The last two definition about MT29F, I think you may use it to distinguish them.  I don't understand it's necessary to me because I use the one only.

I have another question. Did you edit nand_hw_eccoob structure in mxc_nand.c?  I think the default in bsp does not support MT29F2G16 chip.

The board_nand_init() in mxc_nand.c  assign ecc.bytes=9,ecc.layout=&nand_hw_eccoob_512, I think it should be revise according to MT29F2G16.

I think the correct value is  ecc.layout=&nand_hw_eccoob_64 , ecc.bytes = 8.

[BrilliantovKiri]

Hello!

1. $ grep CONFIG_SYS_NAND_BASE include/configs/mx53_evk.h

#define CONFIG_SYS_NAND_BASE          0x40000000

What version U-boot you use, I use u-boot-2009.08 from LTIB?

2. $ grep CONFIG_CMD_FLASH include/config_cmd_default.h

#define CONFIG_CMD_FLASH        /* flinfo, erase, protect       */

No, for drivers/mtd/nand/mxc_nand.c my modification is a very little and not critical, I setup NAND devices in NFC.

Unfortunally now I haven't board with Micron MT29F2G16ABBEA NAND and I can't recheck it work.

[caohaifeng]

Thank you,kirill.

I wish freescale's tech-support group can join our discussion. I am confused about that.

[BrilliantovKiri]

Hello!

Follow my NAND IOMUX comfiguration, hope this help you:

void setup_nand(void)

{

        u32 cfg = (PAD_CTL_PKE_ENABLE | PAD_CTL_PUE_PULL |

                        PAD_CTL_100K_PU | PAD_CTL_ODE_OPENDRAIN_NONE |

                        PAD_CTL_DRV_HIGH);

        clk_config(0, 34, NFC_CLK);

        /* EMI NAND_WEIM_DA[0] */

        mxc_request_iomux(MX53_PIN_EIM_DA0, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA0, cfg);

        /* EMI NAND_WEIM_DA[1] */

        mxc_request_iomux(MX53_PIN_EIM_DA1, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA1, cfg);

        /* EMI NAND_WEIM_DA[2] */

        mxc_request_iomux(MX53_PIN_EIM_DA2, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA2, cfg);

        /* EMI NAND_WEIM_DA[3] */

        mxc_request_iomux(MX53_PIN_EIM_DA3, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA3, cfg);

        /* EMI NAND_WEIM_DA[4] */

        mxc_request_iomux(MX53_PIN_EIM_DA4, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA4, cfg);

        /* EMI NAND_WEIM_DA[5] */

        mxc_request_iomux(MX53_PIN_EIM_DA5, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA5, cfg);

        /* EMI NAND_WEIM_DA[6] */

        mxc_request_iomux(MX53_PIN_EIM_DA6, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA6, cfg);

        /* EMI NAND_WEIM_DA[7] */

        mxc_request_iomux(MX53_PIN_EIM_DA7, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA7, cfg);

        /* EMI NAND_WEIM_DA[8] */

        mxc_request_iomux(MX53_PIN_EIM_DA8, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA8, cfg);

        /* EMI NAND_WEIM_DA[9] */

        mxc_request_iomux(MX53_PIN_EIM_DA9, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA9, cfg);

        /* EMI NAND_WEIM_DA[10] */

        mxc_request_iomux(MX53_PIN_EIM_DA10, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA10, cfg);

        /* EMI NAND_WEIM_DA[11] */

        mxc_request_iomux(MX53_PIN_EIM_DA11, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA11, cfg);

        /* EMI NAND_WEIM_DA[12] */

        mxc_request_iomux(MX53_PIN_EIM_DA12, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA12, cfg);

        /* EMI NAND_WEIM_DA[13] */

        mxc_request_iomux(MX53_PIN_EIM_DA13, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA13, cfg);

        /* EMI NAND_WEIM_DA[14] */

        mxc_request_iomux(MX53_PIN_EIM_DA14, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA14, cfg);

        /* EMI NAND_WEIM_DA[15] */

        mxc_request_iomux(MX53_PIN_EIM_DA15, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_EIM_DA15, cfg);

        /* EMI NANDF_ALE */

        mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);

        mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_CLE */
	mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_CS[0] */
	mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_RB[0] */
	mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_RB_B */
	mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_WE_B */
	mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, cfg | PAD_CTL_HYS_ENABLE);

	/* EMI NANDF_WP_B */
	mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
	mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, cfg | PAD_CTL_HYS_ENABLE);

}

[weidong_sun]

Hi Haifeng,

     Sorry for my mistake ! I confused i.mx6 and i.mx53. yes, you are right, i.MX53 supports 16bit NAND Flash.

Regards,

Weidong

[caohaifeng]

Hi,weidong,

As what I have described above，what I should do or how to port nand driver in uboot?

I don't know what's wrong that I have done.

[caohaifeng]

Hi,weidong,

Thank you for your quick reply. I check the reference manual again, find that it can be set to 4bit ECC when page size is 512B/2K/4K(chapter 7.5.2 , Table 7-11). Can you tell me what's your meaning?