mx6dl TX/RX in UART DTE mode

[chuyuanchiang]

When I set the MX6DL uart1 to DTE mode the TX becomes input, RX becomes output.

Do I have any software method to swap the TX/RX ?

my code definition are:

    MX6DL_PAD_EIM_D19__UART1_CTS,

  MX6DL_PAD_EIM_D20__UART1_RTS,

    MX6DL_PAD_EIM_D23__UART1_DCD,

    MX6DL_PAD_EIM_D25__UART1_DSR,

    MX6DL_PAD_EIM_D24__UART1_DTR,

    MX6DL_PAD_EIM_EB3__UART1_RI,

  MX6DL_PAD_SD3_DAT7__UART1_TXD,

  MX6DL_PAD_SD3_DAT6__UART1_RXD,

and set the DCEDTE bit in UFCR for uart1 likes:

static const struct imxuart_platform_data mx6q_uart1_data __initconst = {

  .flags      = IMXUART_USE_DCEDTE | IMXUART_HAVE_RTSCTS | IMXUART_SDMA,

  .dma_req_rx = MX6Q_DMA_REQ_UART1_RX,

  .dma_req_tx = MX6Q_DMA_REQ_UART1_TX,

};

imx6q_add_imx_uart(0, &mx6q_uart1_data);

in this case, the SD_DAT7_UART1_TX becomes input, and RX becomes to output,

so I change that to:

  MX6DL_PAD_SD3_DAT7__UART1_RXD,

  MX6DL_PAD_SD3_DAT6__UART1_TXD,

but it not works, the SD3_DAT7's direction still input.

Dose it have any software method to do that? I want let the SD3_DAT7's direction becomes output

Thanks,

ChuYuan

[Yuri]

  Please look at the following thread.

“why is linux i.mx6  uart dcedte setup in imx_set_termios”

https://community.freescale.com/thread/350001

  Looks like You need the use the termios to configure UART pins properly.

Have a great day,
Yuri

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[chuyuanchiang]

Hi Yuri,

I am using kernel 3.0.35, it not have device tree, and I had already set the DCEDTE flag in my code (you can refer my first post),

my question is why the Rx is output even I set   MX6DL_PAD_SD3_DAT6__UART1_RXD, that is not my expectation,

so how do I adjust it can let the SD3_DAT6 becomes input??

Thanks,

ChuYua

[Yuri]

Please check if DCEDTE bit in UFCR has been set (on register level).

Also, when configuring IOMUXC_SW_MUX_CTL_PAD_SD3_DATA7 as

UART1_TX_DATA (ALT1 mode) it is needed additionally to configure register

IOMUXC_UART1_UART_RX_DATA_SELECT_INPUT for mode ALT1.

Regards,

Yuri.

[chuyuanchiang]

Hi Yuri,

yes I did set that, in my case, I set the DCEDTE in UFCR and try to set the IOMUXC_UART1_UART_RX_DATA_SELECT_INPUT as 10/11

SD3_DATA6_ALT1 — Selecting ALT1 mode of pad SD3_DAT6 for UART1_RX_DATA.

SD3_DATA7_ALT1 — Selecting ALT1 mode of pad SD3_DAT7 for UART1_TX_DATA.

it should effect my SD3_DAT6 if I set the DATA SELECT INPUT to 11 or 10,

but It is not, the SD3_DAT6 always output, it looks the DATA SELECT INPUT dose not effect the SD3_DAT6 signal.

is that correct?

ChuYuan

[Yuri]

Perhaps it makes sense - first - to check settings under bare metal configuration.

Regards,

Yuri.

[chuyuanchiang]

Hi Yuri,

I don't understand what is the "bare metal configuration"? is that IOMUX?

I am using linux rootfs, so I just using stty -F /dev/ttymxc0 115200 crtscts to do that, and my UART1 is "DTE mode"

I don't understand why the rx is output and tx is input, so I want to swap them by using software method!

my question is "dose the rx/tx can be swapped in DATA SELECT INPUT register?"

if it can, why it dose not work in my board? dose it have another settings on circuit or software IOMUX?

Thanks,

ChuYuan

[Yuri]

I mean stand-alone (OS-less) tests.

For example please try the Platform SDK.

https://www.freescale.com/webapp/Download?colCode=i.MX6_PLATFORM_SDK&location=null&fsrch=1&sr=1&Pare... 

Regards,

Yuri.