imx9322 - troubleshooting

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imx9322 - troubleshooting

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LJGardasoft
Contributor I

I'm working on an #IMX9322# (9x9 package IMX93) and have found the initial samples built to not be operational and the key defining factor of fault is the XTALI and XTALO (_M24) where the pins sit at 0.6V and 0.4V respectively

The power pins are all at correct voltages, but the crystal remains too low to oscillate (was expecting closer to 1.3 - 1.8V as it is driven from the VDD_1V8 from the PMIC.

I've looked at the POR_B and WDOG_ANY as well as ONOFF and checked all the power rails and ground pinout, but still no luck finding an issue.

Is there a tell-tale cause that could keep the XTAL lines at such a low (and unusual) voltage?

 

Any troubleshooting suggestions would be welcome as I've been at it a while.

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Chavira
NXP TechSupport
NXP TechSupport

Hi @LJGardasoft!

 

In this case I will recommend the next:

1) Check the power up sequence.

2) Check the Hardware Design Guide and follow the recommendations about the design of power delivery.

3) Do you generate the proper bootloader for your custom board?

You can take our designs as a reference and compare with your design.

Best Regards!
Chavira

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1,374 Views
LJGardasoft
Contributor I

Hi,

Thanks for the quick answer:

1) The Power up timing looks right:

  VDD_SOC -> 2ms -> VDD_ANA_0P8 -> 2.5ms -> NVCC_1V8 -> 2.5ms -> VDD2_DDR -> 2ms -> VDDQ_DDR -> 3ms -> NVCC_3V3 -> 2ms -> NVCC_SD2 -> 20ms -> POR_B

2) Barring the exact location of caps the design doesn't have any conflicts on power or reset side of things with the design guide.

3) Not sure about this one, the unit is not detected on USB or JTAG, not sure if the function of the XTAL_24M is needed for this

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Chavira
NXP TechSupport
NXP TechSupport

Hi @LJGardasoft!

The power seaquence should be like this:

 

Chavira_0-1724936456892.png

 

IF you confirm that is correct you have to confirm the next recommendations for the 24 MHz crystal:

 

  • Connect a 24 MHz crystal between
    XTALI _24M and XTALO_24M balls.

 

  • This crystal should have ESR not greater than 60 Ω,
    and be rated for a drive level of at least 100 μW.

 

  • Follow the recommendation of the manufacturer for
    loading capacitance.

 

  • Use short traces between the crystal and the
    processor, with a ground plane under the crystal, load
    capacitors, and associated traces.
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1,357 Views
LJGardasoft
Contributor I

Hi,

As my previous message says the power up sequence is correct, the timing is what the datasheet suggests.

The problem that still remains is that the XTALI and XTALO lines are sitting at far below the expected voltage, whether crystal is fitted or not, whether the load capacitors are there or not, and even in line with what the EVK has I've tried fitting a 1M resistor for trouble shooting, the problem persists that regardless of setup XTALI sits at 0.6V and XTALO sits at 0.4V, as they are meant to be powered from 1V8 line I would expect them to sit a fair bit higher than that.

What I hope to get to know is if there is a clear way to diagnose where the process of power up or otherwise operation of the IMX9322 is failing as to attempt to fix it. So the question is: Is there a way to diagnose this further, a pin which would be in a specific state due to fault or a pin being held low/high due to reset/fault?

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Chavira
NXP TechSupport
NXP TechSupport

Hi  @LJGardasoft!

 

its difficult for us to help you in custom designs and always recommend to refer to our evks in that cases.

 

For this case you can refer to imx93 qsb because you are using the 9x9 package and the qsb is using the same package.

 

You can provide a external clock signal to do the test.

 

Can you send me your schematic to validate by my side??

 

I put my iMX93QSB in download mode and I get the next signal:

 

Chavira_0-1725303468084.jpeg

 

 

Best Regards!

Alejandro

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