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imx8mm mini TMU need more accurate temperature calculation using calibration values

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imx8mm mini TMU need more accurate temperature calculation using calibration values

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‎02-19-2024 08:10 PM
2,836 Views
Dandroid4NXP
Contributor II

I need more accurate temperature reporting for the imx8mm processor. Empirical data taken using the linux source code currently does NOT use the factory calibration values for the TMU. 

The driver source code is located here:

https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/drivers/thermal/imx8mm_thermal.c

[..]
static int imx8mm_tmu_get_temp(void *data, int *temp)
{
struct tmu_sensor *sensor = data;
struct imx8mm_tmu *tmu = sensor->priv;
u32 val;
 
val = readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK;
 
/*
* Do not validate against the V bit (bit 31) due to errata
* ERR051272: TMU: Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR invalid
*/
 
*temp = val * 1000;
if (*temp < VER1_TEMP_LOW_LIMIT || *temp > VER2_TEMP_HIGH_LIMIT)
return -EAGAIN;
 
return 0;
}
[..]
Q1. Is there driver source that implements the following formula stated in IMX8MMRM section 

5.4.5 Temperature Sensor Error Correction Method.

Dandroid4NXP_0-1708651450268.png

 

, where Tsense=readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK;

 

The following forum post "if more accurate calibration is required, it should be implemented in the driver(imx8mm_thermal.c) using the equation described in RM"
 
Q2. The IMXMMRM.pdf section  6.3.4 OCOTP Memory Map/Register Definition does not define the TE2 and TE1 values..
Can you please confirm these are the locations?
-or- Different location?
0x3035_04F0[7:0] TSENSOR_VALUE_RT[7:0] (room temp)
0x3035_04F0[15:8] TSENSOR_VALUE_HT[7:0] (high temp)
 
Q3. Does the IMX8MM mini TSENSOR_RES_EXT (J24) pin require 100K resistor to ground for end-user deployed hardware configuration? 
-or- In other words is the 100K resistor only required during a calibration procedure?
On a related note, is there a different resistor value required for industrial temperature grade imx8mm mini part?
Following forum post did not clearly answer..
 
Q4. Section 5.4 Thermal Monitoring Unit (TMU) makes several references to TMR[ ], suggesting this is a register somewhere.. Can you please where I can locate a full definition of TMR ?
Specifically, I'd like the following ref manual references to TMR fields   TMR[ALPF],  TMR[CE],  TMR[MSITE].
 
Q5. Can you please clarify the maximum invalid value error in the temperature reading due to ERR051272?
For example, The temperature is reported with an "invalid value" but is high AND still within bounds of VER1_TEMP_LOW_LIMIT  and VER1_TEMP_HIGH_LIMIT. Since the invalid value was received, I'm concerned the kernel will unexpectedly shutdown.
Would it be better to read the TMU register multiple times with algorithm to better weed out invalid values?

ERR051272: TMU: Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR invalid Description: Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR might be set as invalid value when the temperature varies in range.

Workaround: Do not use Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR. Suggest to read TMU value and use 1 point calibration to justify if the temperature is in range.

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‎02-20-2024 08:12 PM
2,787 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @Dandroid4NXP 

For Q1: No, default driver from NXP doesn't implement the following formula

For Q2, These are correct locations about TE1/TE2 from internal case.

0x3035_04F0[7:0] TSENSOR_VALUE_RT[7:0] (room temp)
0x3035_04F0[15:8] TSENSOR_VALUE_HT[7:0] (high temp)

For Q3:

Zhiming_Liu_0-1708482869169.png

 

For Q4, these references in i.MX8MM RM are not correct. These bits are in i.MX8MQ RM.

Zhiming_Liu_1-1708483945193.png

ALPF--> TMU_TER [ALPF]

ME-->MU_TER [EN]

MSITE-->ignore this bit in i.MX8MM. There are three monitor sites in i.MX8MQ TMU. But for i.MX8MM, there is only one site. You can find that with address offset.

Zhiming_Liu_2-1708484405875.png

 

 

For Q5, i can't find more description about ERR051272 from internal material. Please refer the workaround, Do not use Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR.

For example, The temperature is reported with an "invalid value" but is high AND still within bounds of VER1_TEMP_LOW_LIMIT  and VER1_TEMP_HIGH_LIMIT. 

--> This is correct explanation. That's why NXP  not use V bit in the current driver.

 

Best Regards

Zhiming

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‎02-28-2024 05:23 PM
2,657 Views
Dandroid4NXP
Contributor II

Checking to see if anyone can help with this?

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‎02-20-2024 08:12 PM
2,788 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @Dandroid4NXP 

For Q1: No, default driver from NXP doesn't implement the following formula

For Q2, These are correct locations about TE1/TE2 from internal case.

0x3035_04F0[7:0] TSENSOR_VALUE_RT[7:0] (room temp)
0x3035_04F0[15:8] TSENSOR_VALUE_HT[7:0] (high temp)

For Q3:

Zhiming_Liu_0-1708482869169.png

 

For Q4, these references in i.MX8MM RM are not correct. These bits are in i.MX8MQ RM.

Zhiming_Liu_1-1708483945193.png

ALPF--> TMU_TER [ALPF]

ME-->MU_TER [EN]

MSITE-->ignore this bit in i.MX8MM. There are three monitor sites in i.MX8MQ TMU. But for i.MX8MM, there is only one site. You can find that with address offset.

Zhiming_Liu_2-1708484405875.png

 

 

For Q5, i can't find more description about ERR051272 from internal material. Please refer the workaround, Do not use Bit 31 of registers TMU_TSCR/TMU_TRITSR/TMU_TRATSR.

For example, The temperature is reported with an "invalid value" but is high AND still within bounds of VER1_TEMP_LOW_LIMIT  and VER1_TEMP_HIGH_LIMIT. 

--> This is correct explanation. That's why NXP  not use V bit in the current driver.

 

Best Regards

Zhiming

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‎02-27-2024 09:18 PM
2,692 Views
Dandroid4NXP
Contributor II

Follow up to 

Q1. Is there driver source that implements the following formula stated in IMX8MMRM section 

5.4.5 Temperature Sensor Error Correction Method.

Dandroid4NXP_0-1709092845503.png

 

 

, where Tsense=readl_relaxed(tmu->base + TRITSR) & TRITSR_TEMP0_VAL_MASK;

 

The following forum post "if more accurate calibration is required, it should be implemented in the driver(imx8mm_thermal.c) using the equation described in RM"
 
That you answered
For Q1: No, default driver from NXP doesn't implement the following formula
 
—-
There is an updated Linux kernel drivers that read the OCOTP  TSENSOR_VALUE_RT And TSENSOR_VALUE_HT values and program SECRET UNDOCUMENTED TMU REGISTERS (TASR, TRIM, TCALIV(n)) that appear to apply the calibration point slope & offset bias/intercept.
it appears the Q1 formula does not need to be implemented in software, but is provided by hardware after the special register writes!!!
 
Q1.1 Can you please provide additional documentation on these registers?

Q1.2 Can you please confirm that writing the calibration registers as performed by the driver in imx8mm_tmu_probe_set_calib_v1() or imx8mm_tmu_probe_set_calib_v2() will configure the hardware to use the calibration value , thereafter driver read of TRITSR will return the HARDWARE calibrated temperature value ?
 
 
 
 
 
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‎02-28-2024 05:41 PM
2,654 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @Dandroid4NXP 

1.L6.6.y BSP will contain the patches you mentioned in future release.

2.Technical support doesn't have more document about SECRET UNDOCUMENTED TMU REGISTERS. So we can't give you more information.

3.For last question, need time to confirm.

 

 

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