Hi @Rita_Wang ,
I have a similar issue on IM8MN, I want to use the UART2 in debug and add the UART4 for UART communication in 3v3 voltage with CTS and RTS.
So I want to use the ECSPI2_MISO, MOSI, SS0 and SCLK for the output.
Refer to the suggested changes, I modify you patch this way:
I do no correctly update the lines because I'm using the ddr3l version with 5.10.35 kernel.
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 612fd24..9027f89 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -75,7 +75,7 @@
u-boot,dm-spl;
};
+&pinctrl_uart4 {
+u-boot,dm-spl;
};
// Should I delete the clocks or add new for ECSPI2 ?
@@ -160,4 +160,4 @@
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk.dts b/arch/arm/dts/imx8mn-ddr4-evk.dts
index 3469c21..e291447 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk.dts
+++ b/arch/arm/dts/imx8mn-ddr4-evk.dts
@@ -13,8 +13,8 @@
compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
chosen {
- bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
- stdout-path = &uart2;
+ bootargs = "console=ttymxc3,115200 earlycon=ec_imx6q,0x30A60000,115200";
+ stdout-path = &uart4;
};
reg_usdhc2_vmmc: regulator-usdhc2 {
@@ -158,10 +158,10 @@
>;
};
+ pinctrl_uart4: uart4grp {
fsl,pins = <
+ MX8MN_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x0x1916
>;
};
@@ -524,9 +524,9 @@
status = "okay";
};
+&uart4 { /* COM UART*/
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
};
diff --git a/arch/arm/dts/imx8mn-evk.dts b/arch/arm/dts/imx8mn-evk.dts
index 617c273..ede9d55 100644
--- a/arch/arm/dts/imx8mn-evk.dts
+++ b/arch/arm/dts/imx8mn-evk.dts
@@ -13,8 +13,8 @@
compatible = "fsl,imx8mn-evk", "fsl,imx8mn";
chosen {
- bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
- stdout-path = &uart2;
+ bootargs = "console=ttymxc3,115200 earlycon=ec_imx6q,0x30A60000,115200";
+ stdout-path = &uart4;
};
reg_usdhc2_vmmc: regulator-usdhc2 {
@@ -155,10 +155,10 @@
>;
};
+ pinctrl_uart4: uart3grp {
fsl,pins = <
+ MX8MN_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x0x1916
>;
};
@@ -548,9 +548,9 @@
status = "okay";
};
+&uart4 { /* console */
+pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+status = "okay";
};
- Board Section Updates:
diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c
index 71d99b3..3cfd2a0 100644
--- a/board/freescale/imx8mn_evk/imx8mn_evk.c
+++ b/board/freescale/imx8mn_evk/imx8mn_evk.c
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
static iomux_v3_cfg_t const uart_pads[] = {
+ IMX8MN_PAD_ECSPI2_SCLK__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ IMX8MN_PAD_ECSPI2_MOSI__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ IMX8MN_PAD_ECSPI2_SS0__UART4_DCE_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
+ IMX8MN_PAD_ECSPI2_MISO__UART4_DCE_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const wdog_pads[] = {
@@ -75,7 +75,7 @@ int board_early_init_f(void)
imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
- init_uart_clk(1);
+ init_uart_clk(3);
#ifdef CONFIG_NAND_MXS
setup_gpmi_nand(); /* SPL will call the board_early_init_f */
- Configuration Updates:
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 7db5792..e7b64a7 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -110,7 +110,7 @@
"script=boot.scr\0" \
"image=Image\0" \
"splashimage=0x50000000\0" \
- "console=ttymxc1,115200\0" \
+ "console=ttymxc3,115200\0" \
"fdt_addr=0x43000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"boot_fit=no\0" \
@@ -208,7 +208,7 @@
#define CONFIG_SYS_MEMTEST_START 0x60000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 2))
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
ATF Updates:
- RDC Settings and UART Base address Update:
diff --git a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
index 841ec5a..6ebe48a 100644
--- a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
+++ b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c
@@ -57,7 +57,7 @@ static const struct imx_rdc_cfg rdc[] = {
RDC_MDAn(RDC_MDA_M7, DID1),
/* peripherals domain permission */
- RDC_PDAPn(RDC_PDAP_UART4, D1R | D1W),
+ RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W),
RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W),
/* memory region */
diff --git a/plat/imx/imx8m/imx8mn/include/platform_def.h b/plat/imx/imx8m/imx8mn/include/platform_def.h
index 967afbb..d252e7e 100644
--- a/plat/imx/imx8m/imx8mn/include/platform_def.h
+++ b/plat/imx/imx8m/imx8mn/include/platform_def.h
@@ -51,7 +51,7 @@
#define HAB_RVT_BASE U(0x00000900) /* HAB_RVT for i.MX8MM */
// I don't know what is doing with the IMX_BOOT_UART_BASE, should I change it ?
-#define IMX_BOOT_UART_BASE U(0x30890000)
+#define IMX_BOOT_UART_BASE U(0x30A60000)
#define IMX_BOOT_UART_CLK_IN_HZ 24000000 /* Select 24MHz oscillator */
#define PLAT_CRASH_UART_BASE IMX_BOOT_UART_BASE
Linux Kernel DTS Updates:
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
index 8c736e0..c4ca49e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dts
@@ -22,8 +22,8 @@
compatible = "fsl,imx8mn-evk", "fsl,imx8mn";
chosen {
- bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
- stdout-path = &uart2;
+ bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30A60000,115200";
+ stdout-path = &uart4;
};
leds {
@@ -360,6 +360,14 @@
>;
};
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x0x1916
+ MX8MN_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x0x1916
+ >;
+ };
+
+
pinctrl_typec1: typec1grp {
fsl,pins = <
MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
@@ -935,7 +943,7 @@
status = "okay";
};
-&uart2 { /* console */
+&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
@@ -950,6 +958,12 @@
status = "okay";
};
+&uart4 { /* UART flow control HW*/
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
&usdhc1 {
#address-cells = <1>;
#size-cells = <0>;
This should works for you ? Am I missing some config ?
Thanks,
Adrien