imx8m-mini pcie_ref_clk direction

[michelcounson]

Component concerned: IMX8M Mini

It is not clear if the PCIe reference clock (ball pin A21 & B21) are able to receive or generate a PCIe clock.

On the NXP evaluation module schematics a bidir port have been used for these pins, so we can suppose both possibilities exists.

But, if both possibilities exist, what is the register used to select the input or output mode for the PCIe reference clock.

Moreover, I have not found in the datasheet the full specification of these pins (for input and/or for output mode).

If output mode is available, external pull down resistor needed, external serial resistor needed, drive capabilities?

Thank you for your help

[yangxu]

IMX8QXP also encountered the same problem, want PCIE output 100M clock, which register to set?

[marcelziswiler]

Please note that the mainline i.MX 8M Mini PCIe driver is now on the mailing list for review and I successfully tested it with the PCIe output clock option. Hopefully, this resolves the situation once and for all!

https://marc.info/?l=linux-arm-kernel&m=163402965306538

[michelcounson]

The General Purpose Register 14 (IOMUXC_GPR_GPR14), contains bits that seems to confirm that the IMX8 Mini is able to receive or generate a PCIe clock.

But the behavior of b9, b10, b11 are not perfectly clear

b11 GPR_PCIE1_CLKREQ_B_OVERRIDE
b10 GPR_PCIE1_CLKREQ_B_OVERRIDE_EN
b9 GPR_PCIE1_PHY_I_AUX_EN_OVERRIDE_EN

And still nothing found about full specification of these pins (for input and/or for output mode), external resistor needed...

[weidong_sun]

Hell Michel,

  See below, please!

1. Hardware

---Using internal PCIe Clock( CPU output)

remove R610/R611/R616/R617, populate R614/R615

2. software

Use arch/arm64/fsl-imx8mm-evk-revb.dts, please!

The dts file supports internal PCIe Reference Clock.

Have a nice day!

BR,

Weidong

[michelcounson]

Hello,

Thank you for your answer.

The PCIe clock output mode probably need external load resistor, so we have probably to populate R621 & R622?

I remember that on some IMX6, even if an output mode exists, the recommendation was to use an external PCIe clock generator because the output jitter was too high and not compliant with PCIe specification. Could you confirm that the PCIe clock output mode have been fully qualified on the IMX8M Mini component and that the jitter is compliant with the PCIe gen2 specification?

Not too much risk to use the PCIe clock output mode?

Thank you for your help.

Michel

[weidong_sun]

Hi Michel,

 1. we have probably to populate R621 & R622?

R621 & R622 don't affect PCIe' clock output or input.

2.  Could you confirm that the PCIe clock output mode have been fully qualified on the IMX8M Mini component and that the jitter is compliant with the PCIe gen2 specification?

(1) Output mode is no problem.
A few weeks ago, a German customer and I discussed this issue and successfully used the PCIe clock inside the CPU. No problem. This solution helps customers save costs.

(2) PCIe Gen2 is no problem.

Below is from i.MX8MM reference manual.

Hope above information can help you!

Have a nice day!

BR,

Weidong

[marcelziswiler]

> R621 & R622 don't affect PCIe' clock output or input.

I really don't think this is true. Please have a look here for reference:

https://community.nxp.com/t5/i-MX-Processors/8M-Mini-PCIe-Clock-Generation-Termination/m-p/1233128/h...