imx7d: Rev D: FEC1 in u-boot for 4.1.15_2.0.0_ga release

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imx7d: Rev D: FEC1 in u-boot for 4.1.15_2.0.0_ga release

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skrishnakar
Contributor III

Hi igorpadykov‌,

I am looking for ENET2 i.e FEC1 initialization on i.MX7D Rev-D u-boot-imx-2016.03 that is from imx_4.1.15_2.0.0_ga release, but unfortunately I see I cannot switch the FEC via. ethact and it defaults to FEC0 only, but when kernel boots I can see both FEC0 and FEC1 are functional. Although the u-boot reports both MII devices but does not recognize the FEC1 while switching as shown below:

-------------------------------------------------

U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+g0ec2a01 (Sep 15 2017 - 18:57:13 +0530)

CPU: Freescale i.MX7D rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 36C
Reset cause: POR
Board: i.MX7D SABRESD RevA
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment

Display: TFT43AB (480x272)
Video: 480x272x24
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc0 is current device
Net: FEC0
Normal Boot
Hit any key to stop autoboot: 0

-------------------------------------------------

FEC1 test:

-------------------------------------------------

=> mii info
PHY 0x00: OUI = 0x180361, Model = 0x18, Rev = 0x09, 100baseT, FDX
PHY 0x01: OUI = 0x180361, Model = 0x18, Rev = 0x09, 10baseT, HDX
=> mii device
MII devices: 'FEC0'
Current device: 'FEC0'
=> printenv ethact
ethact=FEC0
=> setenv ethact FEC1
=> printenv ethact
ethact=FEC1
=> saveenv
Saving Environment to MMC...
Writing to MMC(0)... done
=> reset
resetting ...


U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+g0ec2a01 (Sep 15 2017 - 18:57:13 +0530)

CPU: Freescale i.MX7D rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 38C
Reset cause: POR
Board: i.MX7D SABRESD RevA
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Display: TFT43AB (480x272)
Video: 480x272x24
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc0 is current device
Net: FEC0
Normal Boot
Hit any key to stop autoboot: 0
=>

-------------------------------------------------

Is there a pin conflict due to which only FEC0 is set in the u-boot of imx7dsabresd ? Can you kindly confirm on availability of FEC1 (ENET2) at u-boot level for i.MX7D SabreSD Rev-D ? If at all this can enabled along with FEC0 without any other conflicts ?

Thanks in Advance!

-Srikant

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikant

Rev-D changes:

pastedImage_1.jpg

code in mx7dsabresd.c which identifies board revision:

pastedImage_2.jpg

pastedImage_3.jpg

Best regards
igor

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi srikanth

please look at definition: #define CONFIG_FEC_ENET_DEV 0 

in uboot/include/configs/mx7dsabresd.h

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/include/configs/mx7dsabresd.h?h=imx_v20... 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
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skrishnakar
Contributor III

Hello igorpadykov‌,

I have tried changing the "CONFIG_FEC_ENET_DEV 1", which builds fine and u-boot shows up, but it seems there is no effect in practical, as seen below:

-------------------------------------------------------

U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+g0ec2a01 (Sep 15 2017 - 20:02:21 +0530)

CPU: Freescale i.MX7D rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 39C
Reset cause: POR
Board: i.MX7D SABRESD RevA
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Display: TFT43AB (480x272)
Video: 480x272x24
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc0 is current device
Net: FEC1
Normal Boot
Hit any key to stop autoboot: 0


=> pri ethact
ethact=FEC1
=> mii device
MII devices: 'FEC1'
Current device: 'FEC1'
=> mii info
PHY 0x00: OUI = 0x180361, Model = 0x18, Rev = 0x09, 10baseT, HDX
PHY 0x01: OUI = 0x180361, Model = 0x18, Rev = 0x09, 100baseT, FDX
=> pri ipaddr
ipaddr=124.61.58.132
=> ping 124.61.58.100
Using FEC1 device

ARP Retry count exceeded; starting again
ping failed; host 124.61.58.100 is not alive
=>

-------------------------------------------------------

Is there anything that I am missing? Any extra setting or configuration need to be made here ?

Thanks!

-Srikant

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikant

please try with settings in sect.4.4.1.1 attached Linux Guide.

Best regards
igor

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skrishnakar
Contributor III

Hello igorpadykov‌,

If I try to set ethaddr manually, then u-boot complains of mismatch of mac address, thats read from SROM:

--------------------

Net: FEC1
Warning: FEC1 MAC addresses don't match:
Address in SROM is 00:01:9f:04:90:ab
Address in environment is 00:01:02:03:04:05

--------------------

Hence I continued the one that is read from fuse:

---------------------

U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+g0ec2a01 (Sep 18 2017 - 15:56:41 +0530)

CPU: Freescale i.MX7D rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 39C
Reset cause: POR
Board: i.MX7D SABRESD RevA
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Display: TFT43AB (480x272)
Video: 480x272x24
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc0 is current device
Net: FEC1
Normal Boot
Hit any key to stop autoboot: 0
=> pri ethaddr
ethaddr=00:01:9f:04:90:ab
=> pri ipaddr
ipaddr=124.61.58.132
=> pri serverip
serverip=124.61.58.100
=> ping ${serverip}
Using FEC1 device

ARP Retry count exceeded; starting again
ping failed; host 124.61.58.100 is not alive
=>

---------------------

All the switch settings are intact and work fine for ENET0 (FEC0) on the same board. Neither I can ping the serverip nor I can ping to target from host (serverip).

Any pointers would be much appreciated here.

Thanks,

Srikant!

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikant

 

please try direct connection to PC.

 

Best regards
igor

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skrishnakar
Contributor III

Hi igorpadykov‌,

I have connected target to PC directly over cross-over Ethernet cable and manually set the ip addresses on host and it seems to have no effect in the behavior of FEC1 on imx7d:

-----------------------------------------

U-Boot 2016.03-imx_v2016.03_4.1.15_2.0.0_ga+g0ec2a01 (Sep 18 2017 - 15:56:41 +0530)

CPU: Freescale i.MX7D rev1.2 996 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 40C
Reset cause: POR
Board: i.MX7D SABRESD RevA
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Display: TFT43AB (480x272)
Video: 480x272x24
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc0 is current device
Net: FEC1
Normal Boot
Hit any key to stop autoboot: 0
=> pri ipaddr
ipaddr=192.168.1.10
=> pri serverip
serverip=192.168.1.100
=> ping ${serverip}
Using FEC1 device

ARP Retry count exceeded; starting again
ping failed; host 192.168.1.100 is not alive
=>

-----------------------------------------

Host loopback:

-----------------------------------------

linux@mode:~$ ping 192.168.1.100
PING 192.168.1.100 (192.168.1.100) 56(84) bytes of data.
64 bytes from 192.168.1.100: icmp_seq=1 ttl=64 time=0.043 ms
64 bytes from 192.168.1.100: icmp_seq=2 ttl=64 time=0.038 ms
^C
--- 192.168.1.100 ping statistics ---
2 packets transmitted, 2 received, 0% packet loss, time 1001ms
rtt min/avg/max/mdev = 0.038/0.040/0.043/0.006 ms
linux@mode:~$

-----------------------------------------

Host to target:

-----------------------------------------

linux@mode:~$ ping 192.168.1.10
PING 192.168.1.10 (192.168.1.10) 56(84) bytes of data.
From 192.168.1.100 icmp_seq=1 Destination Host Unreachable
^C
--- 192.168.1.10 ping statistics ---
6 packets transmitted, 0 received, +1 errors, 100% packet loss, time 5098ms pipe 4
-----------------------------------------

I have two IMX7D boards that behave identically. I have LS1021-A board too which has 3 ethernet ports and changing ethact was working there without any code change.

Thanks!

-Srikant

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikant

 

from log: "i.MX7D SABRESD RevA" was used, while fec2 is used for board revisions
starting from rev.B according to comments in mx7dsabresd.c setup_iomux_fec() :
On RevB, GPIO1_IO04 is used for ENET2 EN..
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx7dsabresd/mx7dsabresd...

 

Best regards
igor

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skrishnakar
Contributor III

IMX7_Rev-D.PNG

Hi igorpadykov‌,

This is actually a Rev-D board and same query was raised in my previous communications that despite of Rev-D specified on board the u-boot display the message as "Rev-A" because there is no conditional code in u-boot to show Rev-D see: 

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx7dsabresd/mx7dsabresd... 

Line 275-277:

-------------------

#define BOARD_REV_C  0x300 #define BOARD_REV_B  0x200 #define BOARD_REV_A  0x100

-------------------

then Line 291-303:

-------------------

     if (reg != 0) {           switch (reg >> 8 & 0x0F) {           case 0x3:                ret = BOARD_REV_C;                break;           case 0x02:                ret = BOARD_REV_B;                break;           case 0x01:           default:                ret = BOARD_REV_A;                break;           }

-------------------

The Rev-D board defaults to Rev-A hence u-boot displays it as per the default case depicted above. Can you kindly confirm if I have misinterpreted the above setup ? My board has J36-J39 pins that were being referred while using EPDC panel.  Does this u-boot show Rev-D for all latest i.MX7D boards ?

Thanks a lot!

-Srikant

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skrishnakar
Contributor III

Hello igorpadykov‌,

Can you confirm from the above picture whether the board that we are using is Rev-D or Rev-A ? Since all the code used for Rev-A is being used by the latest board even though it is considered as Rev-D ? These boards are dated 2016. 

Thanks,

Srikant

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikanth

on first page schematic there is description of changes rev.A vs D, one can check them:

Schematics (2)
Design files for i.MX 7Dual (REV D)
Design files, including hardware schematics, Gerbers, and OrCAD files for i.MX 7Dual (REV D)
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...

one can try to change board settings so it was identified as "D" and used signal GPIO1_IO04 for ENET2 EN.

Please check this with oscilloscope.

Best regards
igor

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skrishnakar
Contributor III

Hi igorpadykov‌,

I did look into the documents suggested by you and it depicts the EPDC/ENET2 configuration usage, but I couldn't find relevant instructions to change the hardware from Rev-A to Rev-D, the change-log of Rev-D does not reveal much to make a default board Rev-D.

Screenshot at 2017-09-19 16-24-34.png

If you don't mind, would you kindly point me to exact information that I am looking for in the schematics ? The ENET interrupt pin seems to be muxed with UART3 RXD as seen below:

Screenshot at 2017-09-19 16-31-20.png

Is that a jumper or switch setting which turns this board to Rev-D from Rev-A ?

Thanks for your patience!

Regards,

Srikant

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Srikant

Rev-D changes:

pastedImage_1.jpg

code in mx7dsabresd.c which identifies board revision:

pastedImage_2.jpg

pastedImage_3.jpg

Best regards
igor

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skrishnakar
Contributor III

Hi igorpadykov‌,

I was assuming there is a hardware setting or rework that would make it a permanent configuration hence I was asking for reference in schematics, but since you pointed back to u-boot board/machine file, I did the change in u-boot source i.e defaulting to Rev-C and changing the ENET device to 1 made it work:

Screenshot at 2017-09-19 17-13-07.png

Thanks a lot igorpadykov‌ for your continuous support on this. I hope I can use this as default setting on this board.

Thanks,

Srikant

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