sometimes, my imx6q board gets timeout when waiting for flip irq with rate 10~20%.
mxc_ipuv3_fb.c:
it seems there's not irq to do complete. and then it wait_for_completion_timeout.
hwcomposer/hwc_vsync.cpp
FBIO_WAITFORVSYNC error: time expire
i try as below, the issue also come out sometime. could u tell me why or some advice. thx.
1) Wait longer: wait_for_completion_timeout(&mxc_fbi->flip_complete, 4*HZ);
2) ldb_data = {
.ipu_id = 1, # or use ipu 0
.disp_id = 0,
.ext_ref = 1,
.mode = LDB_SIN0,
}
or
ldb_data = {
.ipu_id = 1,
.disp_id = 0,
.ext_ref = 1,
.mode = LDB_SEP0,
.sec_ipu_id = 1,
.sec_disp_id =1,
}
3) fb_data = {
{ /*fb0*/
.disp_dev = "ldb",
.interface_pix_fmt = IPU_PIX_FMT_RGB666,
.mode_str = "LDB-XGA",
.default_bpp = 16,
.int_clk = false,
.late_init = true, # or false
},
}
4)
ipu_data[] = {
{
.rev = 4,
.csi_clk[0] = "clko_clk",
.bypass_reset = false,
}, {
.rev = 4,
.csi_clk[0] = "clko_clk",
.bypass_reset = false,
},
};
Solved! Go to Solution.
I am getting boot errors related to Errata ERR009624.
Booting error is output as below and LCD is not output.
The problem occurs in CPU Silicon Revision V1.1, and it works well in Silicon Revision V1.0.
Can you tell me if there is a patch code that works with CPU Silicon Revision V1.1 and V1.0?
Error Log Messages =====================================================
[ 12.039727] init: Starting service 'keystore'...
[ 12.040849] init: cannot find '/system/bin/rild', disabling 'ril-daemon'
[ 12.041015] init: Starting service 'zygote'...
[ 12.041703] init: Starting service 'gatekeeperd'...
[ 12.051618] init: Starting service 'perfprofd'...
[ 12.052422] init: Starting service 'magd'...
[ 12.258147] android_work: sent uevent USB_STATE=CONNECTED
[ 12.285786] configfs-gadget gadget: high-speed config #1: b
[ 12.291904] android_work: sent uevent USB_STATE=CONFIGURED
[ 12.706534] init: Service 'magd' (pid 270) exited with status 255
[ 13.264230] drivers/video/fbdev/mxc/ldb.c : ldb_disable
[ 13.264282] imx-ipuv3 2800000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000
[ 14.276377] imx-prg 21cd000.prg: wait for buffer ready timeout
[ 14.276894] drivers/video/fbdev/mxc/ldb.c : ldb_enable
[ 15.285237] imx-pre 21cb000.pre: timeout waiting for PRE to run out of problematic window for shadow update
[ 15.407529] init: Starting service 'bootanim'...
[ 16.405411] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 17.405335] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 18.405280] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 18.480366] random: nonblocking pool is initialized
[ 19.405291] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 20.405287] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 21.386198] capability: warning: `main' uses 32-bit capabilities (legacy support in use)
[ 21.405333] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 22.405310] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
[ 23.405270] mxc_sdc_fb fb@0: MXCFB_WAIT_FOR_VSYNC: timeout 0
=========================================================================
Best regards,
James.W
at the same time, i get ipu1_task "D" status, and then the screen can't display anything. log attached.
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 1 address=0x32180000
mxc_sdc_fb mxc_sdc_fb.0: Update complete
warning: `zygote' uses 32-bit capabilities (legacy support in use)
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
request_suspend_state: wakeup (3->0) at 19259779337 (1970-01-01 00:00:12.7501263 35 UTC)
cpufreq_interactive_input_connect: connect to ft5x0x_ts
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 2 address=0x32300000
mxc_sdc_fb mxc_sdc_fb.0: Update complete
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32000000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32000000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32180000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32180000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32300000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32300000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
eth0: Freescale FEC PHY driver [Generic PHY] (mii_bus:phy_addr=1:06, irq=-1)
ADDRCONF(NETDEV_UP): eth0: link is not ready
acc_open
acc_release
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
ehci_fsl_bus_resume begins, Host 1
ehci_fsl_bus_resume ends, Host 1
ehci_fsl_bus_resume begins, DR
ehci_fsl_bus_suspend begins, Host 1
ehci_fsl_bus_suspend ends, Host 1
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32000000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32000000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32180000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32180000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32300000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32300000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32000000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32000000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32180000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32180000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
init: sys_prop: permission denied uid:1003 name:service.bootanim.exit
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32300000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32300000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32000000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32000000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32180000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32180000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: Y wrap disabled
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: Updating SDC DISP4 BG buf 0 address=0x32300000
mxc_sdc_fb mxc_sdc_fb.0: Error updating SDC buf 0 to address=0x32300000, current buf 2, buf0 ready 1, buf1 ready 1, buf2 ready 1
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
Hi Mosee,
I met this same issue,you have solve this issue later? Have any advices?
Thanks,
the same issue with mine.
We are analyzing your inquiry can you please let us know if, waht board are you using? and what Linux BSP ?
hi, jamesbone. thx for your reply. we're using imx6q custom board based on sabresd with jb4.3 1.1.0 bsp.
But how do you run into this case? Is the framebuffer driver in blanking state at that time?
Qiang_FSL Apr 21, 2014 6:59 PM (in response to jamesbone)
From the log we can only know the IPU display is not working correctly. But how do the customer run into this case? Is the framebuffer driver in blanking state at that time?
In a mater of fact, i haven't found out the real reason. But when i power
off/on my device time and time again, it'll run into this case randomly.
Besides, what do u mean blanking state?
On Tue, Apr 22, 2014 at 10:43 PM, Karina Valencia Aguilar <
If the IPU display IDMAC is not enabled (framebuffer in blanking state), the PAN display will get such timeout information.
And if the IDMAC is in wrong state, it can also make PAN display timeout.
Maybe you can add more debug messages in ipu_common.c to check the IDMAC, such as ipu_disable_channel(), ipu_enable_channel(), ipu_init_channel(), ipu_uninit_channel().
hi Qiang Li, I didn't get IDMAC error. and i get this issue rondomly, not always.
"Power off/on the device" is it suspend/resume test or power off/on reboot test? If it is the whole system reboot, can you attach the whole kernel boot log?
What's your display device? LCD, LVDS, HDMI? Single display or multi-display? Did you change any IPU related code in your BSP? In whcih case will you do the suspend/resume? Just idle on home screen?
I am also facing the same kind display issue with "mxc_sdc_fb timeout when waiting for flip irq" message.I am doing power ON and OFF for getting the issue.Our display device is LVDS,single display.We did not make any change in IPU related code.
hey, Jith CR. have u find sth about the issue?
On Mon, May 26, 2014 at 6:21 PM, Jith CR <admin@community.freescale.com>
Hi Mosee,
I am trying to find out sth more about the issue.
Have you solved the issue?
Please share, if you have more information about the issue.
Regards,
Jith
not yet.
i try to improve LCD timing(ldb) which is matter with ipu.
and then it seems to cut down the rate.
but i haven't solved this issue yet.
On Sat, May 31, 2014 at 2:52 PM, Jith CR <admin@community.freescale.com>
hi, Mosee
i encounter this same issue during system boot, do you have solved this issue later? Have any advices?
Thanks,
peter
hey, fang min. i haven't solved yet. but u can have a try to improve it as
below what i mentioned before.
On Thu, Jun 19, 2014 at 6:51 PM, fang min <admin@community.freescale.com>
Hi Mosee Neview, I think you should make sure the IPU plat_data->bypass_reset should be false in ipu_common.c, function ipu_probe().
If bypass_reset is true, the IPU will not be fully initialized.
Kernel config "CONFIG_MX6_CLK_FOR_BOOTUI_TRANS=y" should be removed, and in kernel boot command line, "fb0base=0x27b00000" should be removed too.
On Freescale original BSP, the LVDS panel will be enabled in Uboot, then in kernel, some IPU re-initialization code will be skipped, but on your board, if you had used other dispay device, or you had used other IPU DI port, this setting will get the flip irq error.
This can be double checked in kernel boot up log, if there is two IPU probe information together, that means the two IPU had been initialized fully, if in early log, there is only one IPU probe log, and another IPU's log appears when Android logo displayed, that means that IPU had been bypassed reset:
imx-ipuv3 imx-ipuv3.0: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
imx-ipuv3 imx-ipuv3.1: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)
mxc_mipi_csi2 mxc_mipi_csi2: i.MX MIPI CSI2 driver probed