imx6Q ENET RX FIFO overrun

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imx6Q ENET RX FIFO overrun

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dongfangxiu
Contributor I

According to IMX6SDLCE ERR004512, to prevent overrun of the ENET RX FIFO ,enable pause frame.How?

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  Please check if the following patch is applied in Your system.

[PATCH 1/1 net-next] net: fec: enable pause frame to improve rx prefomance for 1G network

Have a great day,
Yuri

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hiteshviradiya
Contributor I

Hi Yuri,

I am using kernel 3.14.28 and it has this patch already but still I am facing this issue. Any idea?

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Thanks,

Hitesh

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  perhaps a general performance problem takes place in Your case ?

Please try setting the kernel configuration option CONFIG_DMA_CMA.

Regards,

Yuri.

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hiteshviradiya
Contributor I

Dear Yuri,

CONFIG_DMA_CMA flag is also set in our default configurations.

Also I have one more analysis for you. We have imx FEC connected to Marvell switch (88E6176)'s Port#6 directly and Port#0 on RJ45 connector. Now I have shaped (controlled) traffic to 300Mbps using Egress shaping features of switch. Traffic is controlled to ~300 Mbps but still I see errors (though the rate is reduced but not 0 yet). Now if we compare this with Errata, it says 400 Mbps is OK.

Please advise on how can we achieve 400 Mbps w/o errors.

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Thanks,

Hitesh

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hiteshviradiya
Contributor I

Hi Yuri,

I further investigate and found that pause frame configurations are not applied in my kernel. Reason may be we don't have PHY rather we have marvel switch's port#6 (back to back connected to FEC).

Is it the reason for this behaviour?

Can I forcefully applied the settings irrespective of PHY detects or not?

Will it help?

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Thanks,

Hitesh

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  

  Please check if flow control is enabled on the switch.

 

Regards,

Yuri.

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