iMX8QM SCU DDR Configuration Issue

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iMX8QM SCU DDR Configuration Issue

2,242 次查看
prashanthkumar
Contributor II

Hi,

We are working on iMX8QM Custom board with 4.14.98 Kernel BSP (1.2 SCU Firmware). We have boards with 2GB, 4GB & 6GB DDR configuration. By default only one of the DDR configuration will support while compilation time.

The SCFW Compilation Command:
make qm R=B0 B=val M=1 DDR_CON=dcd_b0_6GB_1.6GHz U=2

But we need to compile multiple DDR files, output should be single "scfw_tcm.bin" binary & should support different boards having different DDR configuration. We have some board configuration GPIOs, which is having hardware pull up. Is it possible to differentiate & initialize/compile different DDR configuration (2GB/4Gb/6GB) files based on these board configuration GPIOs in SCFW?

Thanks in Advance,

Best Regards,

Prashanth Kumar K

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art
NXP Employee
NXP Employee

In the current SCU firmware implementation, there is no way to dynamically configure the DDR parameters depending on any conditions during the ROM and SCFW boot flow.


Have a great day,
Artur

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prashanthkumar
Contributor II

Dear Team,

We are waiting for your valuable reply.

Best Regards,

Prashanth Kumar K

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