iMX8MP 27MHz on CSI_MCLK

[khang_letruong]

Dear Community,

I would like to know how to output the 27MHz (instead of default 24MHz) on the MCLK being fed to dual cameras sensors with below configuration, please ?

&i2c2 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";

        /delete-node/ov5640_mipi@3c;

        jxf355_0: jxf355_mipi@40 {
                compatible = "soinc,jxf355";
                reg = <0x40>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi_mclk>;
                clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
                clock-names = "csi_mclk";
                assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
                assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
                assigned-clock-rates = <24000000>;
                csi_id = <0>;
                pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
                rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
                mclk = <24000000>;
                mclk_source = <0>;
                mipi_csi;
                sync-mode = <0>;
                status = "okay";

                port {
                        jxf355_mipi_0_ep: endpoint {
                                remote-endpoint = <&mipi_csi0_ep>;
                                data-lanes = <1 2>;
                                clock-lanes = <0>;
                                clock-noncontinuous;
                        };
                };
        };
};

&i2c3 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c3>;
        status = "okay";

        /delete-node/ov5640_mipi@3c;

        jxf355_1: jxf355_mipi@40 {
                compatible = "soinc,jxf355";
                reg = <0x40>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_csi1_pwn>, <&pinctrl_csi1_rst>;
                clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
                clock-names = "csi_mclk";
                assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
                assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
                assigned-clock-rates = <24000000>;
                csi_id = <1>;
                pwn-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
                rst-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
                mclk = <24000000>;
                mclk_source = <0>;
                mipi_csi;
                sync-mode = <0>;
                status = "okay";

                port {
                        jxf355_mipi_1_ep: endpoint {
                                remote-endpoint = <&mipi_csi1_ep>;
                                data-lanes = <1 2>;
                                clock-lanes = <0>;
                                clock-noncontinuous;
                        };
                };
        };

Thanks in advance and best regards,

Khang

[Chavira]

Hi @khang_letruong !

Thank you for contacting NXP Support!

The csi_mclk source is 24MHz XTAL, can't get 27MHz in this pin.

Sorry for the mistake!

Best Regards!
Chavira

[khang_letruong]

Hi @Chavira,

Someone in the following discussion said that he could get an approximate 27MHz by re-parenting the clock : https://community.nxp.com/t5/i-MX-Processors/IMX8MP-Setting-SYS-PLL-frequency/m-p/1415237

assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>;
assigned-clock-rates = <27000000>;

I also tried and got around 27.4MHz. I might need to find a way to have 27MHz accurately.

What do you think?

Best Regards,

Khang

[Chavira]

Hi @khang_letruong!

Asking internally the response that I got was the same.
The post that are you referring to is a post of a contributor but is not an NXP official solution to this problem.

We recommend not moving the system clocks because we can cause an unstable system.

Best Regards!
Chavira