iMX8M Mini EVK LPDDR4

[tom_perman]

Hi,

I have some questions regarding the iMX8M Mini EVK design, specifically the LPDDR4 sheet in SOM schematic "8MMINILPD4-CPU" and more general LPDDR4 questions. 

• Why is there a 150R resistor termination on the DRAM_CK differential signals?
  • This isn't mentioned in the Hardware Design Guide, and hasn't been observed on LPDDR4 designs for other SoCs
• What is the purpose of the DNP 10K resistors R123, R124, R121 & R122 on DRAM_CKE0/1 
• The recommendation in the Hardware Design Guide is to use 85 Ohm differential controlled impedance for DDR DQS/CLK. However on other LPDDR4 designs these are routed at 100 Ohms. Why is this recommendation different from the standard used?

Thanks,

Tom 

[Yuri]

Hello,

   The i.MX8Mm design recommendations are result of working with the EVK design, therefore

some discrepancies may be observed here. Please try to meet the recent design recommendations.

Have a great day,

Yuri

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