First, most likely, you mean the i.MX8M family of processors, since the i.MX8 and i.MX8X families are not released yet.
So, the i.MX8M series processors have 2 MIPI_CSI camera interfaces of four lanes each. So, all references to the CSI (not MIPI_CSI) interfaces should be treated as "Reserved" in the Memory Map and Interrupt map descriptions. Also, there is nothing to access by application software in the MIPI_CSI_PHY modules, so, the corresponding address ranges also should be treated as "Reserved".
Also, the "Base Address 100h" in the MIPI_CSI register descriptions section is just a typo, just ignore it. The actual base addresses of each of two MIPI_CSI modules are listed in the Memory Map table.
Have a great day,
Artur
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