Dear community,
We have been developing our product with iMX7D.
I hope to connect a LPDDR2 to the iMX7D.
In Reference Manual IMX6SDLRM Rev. 2 , 45.4.5 LPDDR2 and DDR3 pin mux mapping,
it is described that the LPDDR2 and DRAM pin mux mapping for iMX6.
But , in the iMX7D Reference Manual the LPDDR2 and DRAM pin mux mapping is not defined.
[Question]
Could you teach me the LPDDR2 pin mux mapping for iMX7 ?
Or ,as DRAM I/O pad name and LPDDR2 functionality is consistent ,
Is the pin mux mapping unnecessary ?
Best Regards,
Koichi Sakagami
Solved! Go to Solution.
The signal mapping of the i.MX7D DDR bus interface is equal for both DDR3 and LPDDR2 memories, so, no separate pin mapping is required for the LPDDR2 memory.
Have a great day,
Artur
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Dear Artur san,
Thank you for your reply.
I got it.
Is the signal mapping of the i.MX7D DDR bus interface equal for LPDDR3 memory ,too ?
Best Regards,
Koichi Sakagami
Yes.
Best Regards,
Artur
The signal mapping of the i.MX7D DDR bus interface is equal for both DDR3 and LPDDR2 memories, so, no separate pin mapping is required for the LPDDR2 memory.
Have a great day,
Artur
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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