iMX6 eMMC device timeout on first CMD8 (SEND_EXT_CSD)

colinwernham · ‎03-02-2016

The eMMC device on my board (using imx6 SOM) fails the CMD8 stage of the JEDEC protocol (JESD84-B451).

It successfully goes through the protocol up-to that point, which uses the CMD line to send CMDx and receive RESPs, but when attempting to get the extended CSD, it times-out, ie nothing received on the DAT0 line.

The device is in the correct TRANS state (set by the preceding CMD7), and after the timeout and error recovery the device state is still in the TRANS state.

The board has an SDCARD on SDIO2 and eMMC (Micron MTFC4GACAANA-4M) on SDIO3

The /drivers/mmc/mmc.c and fsl_esdhc.c debug trace is below, along with the board emmc initialisation.

Any help solving this would be appreciated!

Colin Wernham

---------------------------------------------------------------------------------------------------

U-Boot > mmc dev 1

~~~ mmc_start_init:1274

~~~ mmc_start_init:1278

~~~ mmc_set_clock:789 clock=400000 (f_min=400000,f_max=52000000)

~~~ mmc_start_init:1280 err=0

~~~ mmc_start_init:1284 err=0

~~~ mmc_set_clock:789 clock=400000 (f_min=400000,f_max=52000000)

CMD_SEND:0

ARG 0x00000000

RETURNED 0 ok

MMC_RSP_NONE

CMD_SEND:8

ARG 0x000001AA

~~~ esdhc_send_cmd:361 IRQSTAT_CTOE irqstat=0x00010000

RETURNED -19 !ERROR!

MMC_RSP_R1,5,6,7 0x00000003

CMD_SEND:55

ARG 0x00000000

~~~ esdhc_send_cmd:361 IRQSTAT_CTOE irqstat=0x00010000

RETURNED -19 !ERROR!

MMC_RSP_R1,5,6,7 0x00000003

CMD_SEND:0

ARG 0x00000000

RETURNED 0 ok

MMC_RSP_NONE

CMD_SEND:1

ARG 0x00000000

RETURNED 0 ok

MMC_RSP_R3,4 0x00FF8080

CMD_SEND:1

ARG 0x40300000

RETURNED 0 ok

MMC_RSP_R3,4 0x00FF8080

CMD_SEND:1

ARG 0x40300000

RETURNED 0 ok

MMC_RSP_R3,4 0xC0FF8080

CMD_SEND:2

ARG 0x00000000

RETURNED 0 ok

MMC_RSP_R2 0xFE014E50

0x31585858

0x581229F3

0x9DE4C100

DUMPING DATA

000 - FE 01 4E 50

004 - 31 58 58 58

008 - 58 12 29 F3

012 - 9D E4 C1 00

CMD_SEND:3

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R1,5,6,7 0x00000500

CMD_SEND:9

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R2 0xD04F0132

0x0F5913FF

0xFFFFFFE7

0x8A400000

DUMPING DATA

000 - D0 4F 01 32

004 - 0F 59 13 FF

008 - FF FF FF E7

012 - 8A 40 00 00

CMD_SEND:13

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R1,5,6,7 0x00000700

CURR STATE:3 [STANDBY]

~~~ mmc_startup:899 err=0 mmc->version=66560

~~~ mmc_set_clock:789 clock=20000000 (f_min=400000,f_max=52000000)

~~~ mmc_startup:942 clock=20000000

~~~ mmc_startup:943 tran_speed=25000000

~~~ mmc_startup:944 freq=1000000

~~~ mmc_startup:945 mult=25

~~~ mmc_startup:946 MMC_MAX_BLOCK_LEN=512

~~~ mmc_startup:947 read_bl_len=512

~~~ mmc_startup:948 write_bl_len=512

~~~ mmc_startup:949 high_capacity=1

~~~ mmc_startup:950 csize=1

~~~ mmc_startup:951 cmult=1

~~~ mmc_startup:952 capacity_user=512

CMD_SEND:7

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R1,5,6,7 0x00000700

CMD_SEND:13

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R1,5,6,7 0x00000900

CURR STATE:4 [TRANS]

CMD_SEND:8 [<<----CMD8 FAILS]

ARG 0x00000000

~~~ esdhc_send_cmd:413 IRQSTAT_DTOE irqstat=0x00100001

RETURNED -19 !ERROR!

MMC_RSP_R1,5,6,7 0x00000900

CMD_SEND:13

ARG 0x00010000

RETURNED 0 ok

MMC_RSP_R1,5,6,7 0x00000900

CURR STATE:4 [TRANS]

mmc1 is current device

U-Boot >

---------------------------------------------------------------------------------------------------

In the board file:

#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \

PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \

PAD_CTL_SRE_FAST | PAD_CTL_HYS)

:

MX6QDL_SET_PAD(PAD_SD3_CLK__USDHC3_CLK , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_CMD__USDHC3_CMD , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT0__USDHC3_DAT0 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT1__USDHC3_DAT1 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT2__USDHC3_DAT2 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT3__USDHC3_DAT3 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT4__USDHC3_DAT4 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT5__USDHC3_DAT5 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT6__USDHC3_DAT6 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_DAT7__USDHC3_DAT7 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

MX6QDL_SET_PAD(PAD_SD3_RST__USDHC3_RST , MUX_PAD_CTRL(USDHC_PAD_CTRL));

/* MX6QDL_SET_PAD(PAD_GPIO_18__USDHC3_VSELECT, MUX_PAD_CTRL(USDHC_PAD_CTRL));*/

usdhc3_cfg.max_bus_width = 8;

usdhc3_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);

fsl_esdhc_initialize(bis, &usdhc3_cfg);

---------------------------------------------------------------------------------------------------

clementmartin · ‎03-27-2018

I got the same trouble with u-boot 2017, but with the same board, the same iomux and the same board files, u-boot 2015 is working... May I miss an CONFIG_XXX option somewhere but I can't found it. It's seems that /drivers/mmc.c as changed a little with frequency, but I don't find something which could be responsible of this

simonecumar · ‎10-31-2017

Is there a resolution of this issue?

greghuber · ‎11-23-2016

Was there any resolution to this issue? I am having a similar problem with a similar Micron eMMC part on the LS1021A eSDHCI bus. In my case, U-Boot can read the part and load the kernel into memory. The kernel starts booting but I get the same CMD8 failure when the kernel first attempts to access the root file system on the eMMC chip. More details can be provided if necessary.

Thank You.

Greg

igorpadykov · ‎03-02-2016

Hi Colin

it looks like hardware issue, one can check emmc voltages signals

by oscilloscope, as seems it does not output any data.

Also one can try baremetal test (attached part of i.MX6 SDK).

Where is the iMX6 Platform SDK maintained?

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------