iMX6 - CPU frequency lowered during LDO bypass setting

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

iMX6 - CPU frequency lowered during LDO bypass setting

ソリューションへジャンプ
1,705件の閲覧回数
Ansari
Contributor IV

Hi,

We are using imx6Q sabresd platform for our development with Linux 3.14.28_1.0.0-GA BSP but initially we used Linux 3.10.17_1.0.0-GA BSP.

We have gone through below files from Linux 3.14.28_1.0.0-GA(File-1) and Linux 3.10.17_1.0.0-GA (FIle-2) BSPs.

File-1: ~/u-boot-imx/board/freescale/mx6sabresd/mx6sabresd.c

File-2: ~/u-boot-imx/board/freescale/mx6qsabresd/mx6qsabresd.c

We could see some changes are added in File-1(compare to File-2).

In below function, we understood that the CPU frequency is lowered to 400Mhz before doing the LDO bypass and CPU frequency is increased to 800Mhz after the LDO bypass settings.

"ldo_mode_set"

In FIle-2 (Linux 3.10.17_1.0.0-GA), the below function will do the LDO bypass settings without changing the CPU frequency.

"ldo_mode_set"

We would like to know, during the LDO bypass settings why the CPU frequency is lowered in File-1(Linux 3.14.28_1.0.0-GA)?  Is it recommended  to do the same.?

Thank You,

Regards,

Ansari

ラベル(7)
0 件の賞賛
返信
1 解決策
1,073件の閲覧回数
andreascian
Contributor III

Dear Igor,

by looking inside u-boot code and the commits from FSL engineer, it seems that the older implementation is a violation of datasheet power constraint

I've search for some details inside the code/datasheet and I found the some information I sent to Abdul in meta-freescale mailing list:

https://lists.yoctoproject.org/pipermail/meta-freescale/2015-April/013447.html

WDYT about that?

Kind Regards,

Andrea

元の投稿で解決策を見る

0 件の賞賛
返信
4 返答(返信)
1,073件の閲覧回数
Ansari
Contributor IV

Dear Igor and Andrea,

Thank you for your valuable inputs.

Regards,

Ansari

0 件の賞賛
返信
1,073件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Abdul

CPU frequencylowering during the LDO bypass is not requirement,

but it provides less power spikes, so gives more board stability.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信
1,074件の閲覧回数
andreascian
Contributor III

Dear Igor,

by looking inside u-boot code and the commits from FSL engineer, it seems that the older implementation is a violation of datasheet power constraint

I've search for some details inside the code/datasheet and I found the some information I sent to Abdul in meta-freescale mailing list:

https://lists.yoctoproject.org/pipermail/meta-freescale/2015-April/013447.html

WDYT about that?

Kind Regards,

Andrea

0 件の賞賛
返信
1,073件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Andrea

I think these considerations are quite reasonable.

Best regards

igor

0 件の賞賛
返信