i2c5 enable on imx8mpevk

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i2c5 enable on imx8mpevk

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johnwbyrd
Contributor II

After booting yocto on imx8mpevk, the only i2c devices present in /dev are i2c-0, i2c-1, i2c-2, and i2c-6 .  My current understanding is that the I2C_CN connector is i2c5.  I'd like to attach a DAC to it; however, there is no /dev/i2c-5 device present on the imx8mp.  What steps should I be following to enable this connector for i2c in yocto?  Thank you kindly for your assistance.

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johnwbyrd
Contributor II

I'm sorry, but your solution did not work for me.

Modifying the imx8mp-evk.dts file in linux-imx produced the correct result, where I am now able to use i2cdetect 4 to query devices on the i2c5 bus.

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 0ece8e524e44..a73b55f39578 100755
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -302,7 +302,8 @@ &flexcan1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_flexcan1>;
        xceiver-supply = <&reg_can1_stby>;
-       status = "okay";
+       pinctrl-assert-gpios = <&pca6416 2 GPIO_ACTIVE_HIGH>; /* set high to select i2c5 instead of flexcan1 */
+       status = "disabled";
 };

 &flexcan2 {
@@ -567,6 +568,20 @@ ov5640_mipi_1_ep: endpoint {
        };
 };

+&i2c5 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c5>;
+       pinctrl-assert-gpios = <&pca6416 2 GPIO_ACTIVE_HIGH>; /* set high to select i2c5 instead of flexcan1 */
+       status = "okay";
+
+       dac_1: mcp4725@60 {
+               compatible = "microchip,mcp4725";
+               reg = <0x60>;
+               vdd-supply = <&reg_audio_pwr>;
+       };
+};
+
 &irqsteer_hdmi {
        status = "okay";
 };
@@ -991,6 +1006,13 @@ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA           0x400001c3
                >;
        };

+       pinctrl_i2c5: i2c5grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL         0x400001c3
+                       MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA         0x400001c3
+               >;
+       };
+
        pinctrl_mipi_dsi_en: mipi_dsi_en {
                fsl,pins = <
                        MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08     0x16
 

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johnwbyrd
Contributor II

Thank you, Khang.  Your change does in fact create a /dev/i2c-4 device.  We have attached an MCP4725 DAC to this bus, and added support to the dts file:

&i2c5 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5>;
status = "okay";

mcp4725@60 {
compatible = "microchip,mcp4725";
reg = <0x60>;
vdd_supply = <&reg_audio_pwr>;
};
};

The mcp4725 driver loads, but it reports "failed to read DAC value".  Also, running i2cdetect 4 fails to detect any devices on the i2c5 bus.

Are there any other requirements for setting up the i2c5/I2C_CN bus for communications?

Thank you for your kind assistance.

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khang_letruong
Senior Contributor III

Hi @johnwbyrd ,

You can probe i2c5's SDA/CSL signals while doing the reading/writing/scanning with i2cset, i2cget, i2cdetect, ... to verify the its functionality first.

Then there's might be issue with I2C address.

Br,

K

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johnwbyrd
Contributor II

I'm sorry, but your solution did not work for me.

Modifying the imx8mp-evk.dts file in linux-imx produced the correct result, where I am now able to use i2cdetect 4 to query devices on the i2c5 bus.

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 0ece8e524e44..a73b55f39578 100755
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -302,7 +302,8 @@ &flexcan1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_flexcan1>;
        xceiver-supply = <&reg_can1_stby>;
-       status = "okay";
+       pinctrl-assert-gpios = <&pca6416 2 GPIO_ACTIVE_HIGH>; /* set high to select i2c5 instead of flexcan1 */
+       status = "disabled";
 };

 &flexcan2 {
@@ -567,6 +568,20 @@ ov5640_mipi_1_ep: endpoint {
        };
 };

+&i2c5 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c5>;
+       pinctrl-assert-gpios = <&pca6416 2 GPIO_ACTIVE_HIGH>; /* set high to select i2c5 instead of flexcan1 */
+       status = "okay";
+
+       dac_1: mcp4725@60 {
+               compatible = "microchip,mcp4725";
+               reg = <0x60>;
+               vdd-supply = <&reg_audio_pwr>;
+       };
+};
+
 &irqsteer_hdmi {
        status = "okay";
 };
@@ -991,6 +1006,13 @@ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA           0x400001c3
                >;
        };

+       pinctrl_i2c5: i2c5grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL         0x400001c3
+                       MX8MP_IOMUXC_SPDIF_RX__I2C5_SDA         0x400001c3
+               >;
+       };
+
        pinctrl_mipi_dsi_en: mipi_dsi_en {
                fsl,pins = <
                        MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08     0x16
 
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Zhiming_Liu
NXP TechSupport
NXP TechSupport

The i2c1 in dts is /dev/i2c-0 device, so the /dev/i2c-4  is i2c-5 .

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khang_letruong
Senior Contributor III

HI @johnwbyrd ,

You can inspire the existing i2c nodes of imx8mp-evk.dts of imx8mp-evk-lpddr4.dts according to your EVK's revision :

1. Add the i25 node :

&i2c5 {
        clock-frequency = <1000000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c5>;
        status = "okay";
};

 

2. Configure GPIOs for i2c5 SDA/SCL :

&iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;

        ....

        pinctrl_i2c5: i2c5grp {
                fsl,pins = <
                        MX8MP_IOMUXC_SD1_CLK__I2C5_SCL                  0x400001c3
                        MX8MP_IOMUXC_SD1_CMD__I2C5_SDA                  0x400001c3
                >;
        };
};

 

BR,
Khang

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