i.mx6 ddr3 impedance requirements

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i.mx6 ddr3 impedance requirements

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vigneshvasudeva
Contributor II

Hi,

We are working on a HDMI dongle based on I.MX6Q with reference to the design files shared in this link

Except for an additional radio module and an alternate PMIC in our design, the PCB design file is just a replica of your dongle.

In this regard, we have few queries regarding impedance matching in PCB as listed below

1. The single ended trace width and clearance in DDR section is 4.5 mils and 4 mils respectively. Is it for 50Ω impedance?

2. The differential signal trace width and spacing in DDR section is 3.7 mils and 7 mils respectively. Is it for 100Ω impedance?

3. The differential signal trace width and spacing in HDMI section is 3.7 mils and 7 mils respectively. Is it for 100Ω impedance?

4. The differential signal trace width and spacing in USB Host section is 4 mils and 5 mils respectively. Is it for 90Ω impedance?

We could not spot the fab details anywhere in the available Gerber. So, basically we have no idea on the stackup and that's the reason I put these questions to you.

Also, please let us know about if there are application notes which explains about the impedance matching requirements for DDR3 and HDMI peripherals in I.MX6.

We are depending on your reply to get the stack-up finalized from our fab vendor.

Regards,

Vignesh Vasudevan

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jamesbone
NXP TechSupport
NXP TechSupport

You are correct let me send you the i.MX6 Hardware User Guide in section 3.2 you would find the Stackup recommendations,. But after review your questions you are correct.

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf


Have a great day,
Jaime

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