i.MX93 Multicore GPIO access

[NZP]

Hello Experts,

I am working on i.MX93, I am running Linux on cortex-A55, and I am accessing GPIO1.IO[0] as an input pin, Now I want to access GPIO1.IO[1] from cortex-m33 core.

So here my question is that,

1. is it possible to access two different pins of one GPIO port from cortex-A55 and cortex-m33.

2. if yes than do I need to take care of any special thing in cortex-A55 or cortex-m33 side.

[Zhiming_Liu]

Yes, you can. Please take case the competition between two processors. If you assign GPIO1.IO[1] to M33, make sure A55 not use it at same time.

[opedis]

Zhiming,

I could not agree with you.

The i.MX93 gpio is orgnized by group. one gpio data register is for 32 bit/pin out put.

And according to the basic real time knowledge, the real time task need dedicated resource. Or it could not be real time. So, in this case of GPIO1. If the case on M core side is real time task, GPIO1 all 32 bit need to give to M core side, If the case on M core side is not real time task, the semaphore shoule be put on the entire GPIO1.

And even, it is related to the hardware design.

Here is NXP i.MX93 hardware design guide

[NZP]

Hi Zhiming_Liu,

Thanks for your comments,

I have one doubt, in cortex-m33 side do I need to configure clocks for gpio ? because this same port is going to be shared between both the cores.

CLOCK_SetRootClock(EXAMPLE_RGPIO_CLOCK_ROOT, &rgpioClkCfg);
CLOCK_EnableClock(EXAMPLE_RGPIO_CLOCK_GATE);
CLOCK_EnableClock(kCLOCK_Gpio1);