i.MX91 GPIO

[Embedded-world]

Dear Experts,

I referred to the i.MX 91 Applications Processor Reference Manual, Rev. 2, dated 2024-11-07. Could you please provide clarity regarding the GPIO mux functionality for I2C2_SDA & I2C2_SCL?

I2C2_SDA: 

I2C2_SCL:

As of now mentioned same GPIO mux in the manual.


Thanks & Regards
Ravikumar

[pengyong_zhang]

Hi @Embedded-world 

You can get the IOMUX function from below link:

https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/arch/arm64/boot/dts/freescale/imx91-pinfunc.h

Each integers description as following:

            - description: |

                "mux_reg" indicates the offset of mux register.

            - description: |

                "conf_reg" indicates the offset of pad configuration register.

            - description: |

                "input_reg" indicates the offset of select input register.

            - description: |

                "mux_val" indicates the mux value to be applied.

            - description: |

                "input_val" indicates the select input value to be applied.

B.R

[Nobita]

There should be many example shows you how to configure a pin function in dts file, for example:

https://github.com/nxp-imx/linux-imx/blob/569b33a1d0192fd51144ea6a79345b658aaec329/arch/arm64/boot/d...

MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e

the definition of MX93_PAD_CCM_CLKO2__GPIO3_IO27 is #define MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x008C 0x023C 0x0000 0x5 0x0

from the comment in arch/arm64/boot/dts/freescale/imx93-pinfunc.h we can see: The pin function ID is a tuple of
*<mux_reg conf_reg input_reg mux_mode input_val>
that is to say when you want to configure a pin's function you can just choose the predefintion in this file, the second part 0x31e in dts means minor tuning config for a special pin.
you can also refers to the pinctrl driver in drivers/pinctrl/freescale/pinctrl-imx93.c to see more details.